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Full integration of digital circuits will progress with increasingly minute design rules and higher mobility in TFT devices and improvement in processes. Together with improvements in circuit design technology, the low-temperature polysilicon (LTPS) TFT LCD is expected to be one of the most promising displays for digital tools such as cellular phones and PDAs, whose future market size is expected to expand by leaps and bounds. Moreover, improvements to minimize the scattering of the Vth of adjacent TFTs will bring about the integration of an op-amp and the further full-integration of analog/digital circuits on glass substrates.

In the evolution of panel design, larger display and higher resolution will be the main-stream of future technology for panel manufacturers. LTPS TFT process is one of many technologies that could fulfill the abovementioned requirements. It had become a more and more impor tant milestone for panel manufacturers who want to maintain their competitiveness.

Figure 1a shows the ID–VG plot of p-type LTPS TFTs with glass and PI substrates on the top gate structure, before and after a gate stress of − 30 V for 4,000 s at 70 °C. In Fig. 1b, ΔVth after BTS was plotted as a box plot using 5 TFTs fabricated on the glass and PI substrate. On average, the ΔVth of the TFT fabricated on glass showed a slight change, less than − 0.02 V, and the ΔVth of the TFT fabricated on the PI showed a positive shift with an average 0.83 V. In addition, Ion increased from 2.08 × 10–5 A to 2.46 × 10–5 A, and field effect mobility increased from 85 to 113 cm−2. However, under the identical stress conditions, the parameters of the LTPS TFT fabricated on glass substrate are rarely changed. It is somewhat interesting to note that the Vth of p-type LTPS TFTs with a PI substrate is positively shifted under the negative gate bias. It is speculated that the negative charging is generated from the PI substrate below the gate insulation layer.

(a) ID–VG plot of P-type LTPS TFTs before and after the BTS. Note that the P-type LTPS TFTs were fabricated on glass (black filled circle) and PI (blue filled triangle) substrates and (b) ΔVth before/after BTS of TFTs fabricated on glass and PI substrates.

In order to further probe the positive Vth shifts, 4-pad evaluation was conducted. As shown in Fig. 2a, a bias of 50 V was applied to the floating gate adjacent to the LTPS TFT to minimize the effects of the poly channel on electrical charging in the PI substrate. Vth behaviors are shown in Fig. 2b. As shown, the LTPS TFT with a glass substrate demonstrates stabilized Vth behaviors throughout stressing at 70 °C up to 80,000 s. Note that Region I, II, and III represent the temperature and bias conditions used; 70 °C without bias, 70 °C with 50 V, and room temperature without bias, respectively. From Region I to II, the Vth of the TFT with a PI substrate increases and positively shifts with increasing time. The Vth tends to decrease and then return to the initial Vth after 1 h in Region III. In turn, Region III is intended to observe the recovery behaviors of the Vth of the LTPS TFT with a PI substrate. Since the recovery of the Vth observed in Region III could result in display image disturbance, such as image sticking defined as residual images, efforts in electrical and physical characterization are inevitable. One would argue that the positive Vth shifts of the TFT with a PI substrate mentioned are related to design flaws somehow associated with the layout design of the metal route, which can impact TFT stability as electrical fields arise from adjacent metals near TFT devices. However, such artifacts were eliminated by design review throughout circuit simulation.

(a) Schematic of 4-pad characterization (floating gate, source, gate and drain) and (b) normalized Vth behaviors of P-type LTPS TFTs fabricated on the on glass (black filled circle) and PI (blue filled triangle) substrates.

Since the Vth stability of TFT devices plays an important role for display image performance, particularly for image sticking, the relationship between the ΔVth vs. image sticking was investigated. Using the checkerboard test pattern, the image sticking index is estimated by comparing luminance changes before and after stressing3 shows the correlation between PI charging induced ΔVth and image sticking. It is shown that the larger the ΔVth, the higher the propensity for image sticking. These results show that the correlation between Vth shift and image sticking needs to be further discussed with electrical and physical characterization.

In an effort of probing the Vth behaviors mentioned above, three different metal–insulator-metal (MIM) capacitors, such as Ag/PI/Ag, Ag/SiO2/Ag and Ag/SiO2/PI/Ag were prepared for the C–V measurements conducted by varying voltage at a frequency of 100 kHz. SIO2 is the barrier layer of the LTPS TFT, and the thickness and process conditions are the same with the measured TFT. Figures 4a–d show the schematics of the vertical structure for the MIM capacitors, i.e., Ag/SiO2/Ag, Ag/PI/Ag, Ag/SiO2/PI/Ag, and the cross-sectional analysis of the MIM capacitor. An Ag metal electrode was sputtered onto the spin-coated PI and SiO2, deposited using the PECVD process. As a result, the PI and PI/SiO2 function as the insulators between the metal electrodes.

Figure 5 shows the results obtained from the C–V measurements. It is apparent that changes in capacitance depend on the MIM capacitors. The capacitances of the SiO2 and PI dielectric insulators between the Ag electrodes rarely change, even with increasing voltage (see Fig. 5a,b). However, the capacitance of the SiO2/PI dielectric tends to increase with increasing voltage. It was also found that the magnitude of capacitance turns into the initial state after 1 h of halting bias, as shown in Fig. 5c. In Fig. 5d, the capacitance of the SiO2/PI rapidly increases with increasing voltage. Such results agree well with the recovery of the Vth described in Fig. 2b. Thus, it is legitimate that the positive Vth shift of a TFT with a PI substrate is attributed to charging between the SiO2 and PI interface. As such, charge generation at the interface between the SiO2 and the PI plays an important role for TFT device stability, particularly for the PI substrate.

In sequence, SIMS analysis is adopted to explicate the positive Vth shifts of p-type LTPS TFTs with a PI substrate. To understand the effects of PI on the Vth shift, two different PIs with low and high crosslink density, named PI-A and PI-B, were chosen to prepare the Ag/SiO2/PI/Ag capacitor. We first suspected that oxygen or moisture had penetrated from the PI. Changes in hydrogen ions (H−), hydroxyl group (OH−), and oxygen ions (O−) before/after bias stress of Ag/SiO2/PI/Ag capacitors were confirmed through SIMS analysis. Figure 6 shows the results of SIMS analysis before and after bias stress of MIM capacitors fabricated based on PI-A and PI-B. There was no change in H−, OH−, or O− before/after bias stress, confirming that there was no penetration of oxygen or moisture from PIs. Figure 7 shows the correlation between the fluorine profile at the SiO2/PI interface and capacitance, characterized by SIMS and C–V measurement. Comparatively, the SIMS analyses revealed that PI-A has a higher florin content than PI-B at the interface (see Fig. 7a,c). In consequence, C–V measurements shown in Fig. 7b,d show that the capacitance of the MIM capacitor with PI-B is rarely changed even with increased stressing at 70 °C. It has been reported that the negative fluorine ions, F-, are subjected to transfer and trapped in the SiO2 under the bias- in the SiO2/PI interface contributes to the positive shifts of LTPS TFTs with a PI substrate. This suggests that the amount of charging generated in the PI is dependent on the material property of the PI. Hence, the material property of the PI is a crucial factor that can influence LTPS TFTs with a PI substrate. It has been also found that PI charging that significantly affects TFT reliability can be successfully suppressed by the selection of a proper PI with high volume resistivity

Based on empirical data collected from reliability assessments, Silvaco TCAD was used to simulate the effects of charging at the SiO2/PI interface on the TFT transfer curve. Figure 8 shows the ID–VG plot of an LTPS TFT with a PI substrate. As shown, the negative charging in the SiO2/PI interface shifts the Vth to the positive direction, while the positive charging results in a negative Vth shift. Accordingly, when − 2 × 1011/cm2 charging is generated at the interface between the SiO2 and the PI, the estimated Vth shift toward the positive direction is 0.84 V.

Table 2 contains the estimated TFT parameters, such as Vth, μFE, subthreshold swing (SS), and on/off ratio, based on the given charge injections shown in Fig. 8.

Figure 9 is given to explain the hole concentration of an LTPS TFT with a PI substrate with the bias conditioned at VGS − 30 V and VDS − 0.1 V. The Reference (black filled circle) and − 2 × 1011/cm2 (blue filled triangle) represent the LTPS TFT with and without charging at the SiO2 and PI interface. Recall that 2 × 1011/cm2 is obtained from the C-measurement summarized in Table 1. As shown in the inlet in Fig. 9, when the negative bias is applied to the gate of the LTPS TFT, hole carriers tend to be accumulated near the channel and then exponentially decrease. However, when negative charging exists at the PI substrate, hole concentration decreases then increases below the channel depth of 30 nm. It is known that the negative charges at the interface between the SiO2 and PI result in an early turn-on Vth leading to increased field effective mobility and Ion, which is similar to the ID–VG characteristic observed from the double gate TFTs

TCAD simulation for hole concentration (cm−3) versus channel depth (nm) of an LTPS TFT with a PI substrate. Reference represents a LTPS TFT with a PI substrate without charge injection at the SiO2/PI interface.

(8 February, 2018) – Total shipments of mobile phone displays, including thin-film transistor liquid crystal display (TFT LCD) and active matrix organic light-emitting diode (AMOLED) panels, reached 2.01 billion units in 2017, up 3 percent from 2016, according to preliminary estimate from business information provider

In the growing mobile phone display market, shipments of low-temperature-poly-silicon (LTPS) TFT LCD panels, which realize high-resolution images, increased by 21 percent to 620 million units in 2017 compared to the previous year. Shipments of amorphous silicon (a-Si) TFT LCD mobile phone panels declined 4 percent to 979 million units during the same period. Even though shipments of AMOLED panels jumped in the second half of 2017 thanks to the launch of the iPhone X, combined with the weak demand in the first half, its shipments were up just 3 percent to 402 million units in 2017.

In the smartphone-use LTPS TFT LCD market, Tianma, a leading small and medium panel supplier in China, has shown significant growth, expanding its shipments to Chinese smartphone set brands, such as Huawei and Xiaomi. In 2017, Tianma shipped 105 million LTPS TFT LCD panels for smartphones, almost double its shipments in 2016, with a market share of 17 percent, up 6 percentage points from 2016. It ranked the second largest LTPS TFT LCD supplier for smartphones in 2017, taking over LG Display with 16 percent, down 4 percentage points, and Sharp with 13 percent, down 1 percentage point. In 2017, Japan Display continued its market leader position but shed its share by 10 percentage points to 26 percent in 2017, according to the latest

“LTPS TFT is a key technology to produce high-resolution displays for smartphones, and experience is required to optimize highly complex LTPS manufacturing process in each production fab. In terms of experience, Japanese and South Korean panel makers have a competitive advantage compared to Chinese makers,” said

. “However, Chinese LCD makers, such as Tianma and BOE, are catching up LTPS technology fast enough to support high demand from Chinese smartphone set makers.”