lcd panel bpp made in china

In recent time, China domestic companies like BOE have overtaken LCD manufacturers from Korea and Japan. For the first three quarters of 2020, China LCD companies shipped 97.01 million square meters TFT LCD. And China"s LCD display manufacturers expect to grab 70% global LCD panel shipments very soon.

BOE started LCD manufacturing in 1994, and has grown into the largest LCD manufacturers in the world. Who has the 1st generation 10.5 TFT LCD production line. BOE"s LCD products are widely used in areas like TV, monitor, mobile phone, laptop computer etc.

TianMa Microelectronics is a professional LCD and LCM manufacturer. The company owns generation 4.5 TFT LCD production lines, mainly focuses on making medium to small size LCD product. TianMa works on consult, design and manufacturing of LCD display. Its LCDs are used in medical, instrument, telecommunication and auto industries.

TCL CSOT (TCL China Star Optoelectronics Technology Co., Ltd), established in November, 2009. TCL has six LCD panel production lines commissioned, providing panels and modules for TV and mobile products. The products range from large, small & medium display panel and touch modules.

Established in 1996, Topway is a high-tech enterprise specializing in the design and manufacturing of industrial LCD module. Topway"s TFT LCD displays are known worldwide for their flexible use, reliable quality and reliable support. More than 20 years expertise coupled with longevity of LCD modules make Topway a trustworthy partner for decades. CMRC (market research institution belonged to Statistics China before) named Topway one of the top 10 LCD manufactures in China.

The Company engages in the R&D, manufacturing, and sale of LCD panels. It offers LCD panels for notebook computers, desktop computer monitors, LCD TV sets, vehicle-mounted IPC, consumer electronics products, mobile devices, tablet PCs, desktop PCs, and industrial displays.

When using large displays with fast pixel clock rates, the latency of the system becomes a bigger factor in LCD performance than system bandwidth needed for the display. The 32x0 can drive an 800x600 display at 32bpp, but if something else monopolizes an internal bus or the DRAM too long, the LCD FIFO will underflow giving an annoying glitch on the display. As the high clock rates and data consumption needed for that display @32bpp, the system probably just can"t keep up.

You can try toggling the state of the watermark bit in the LCD controller. This will cause the LCD controller to request FIFO servicing more often. Also examine the bus timeouts (see the EMC bus timeout registers) and make sure the timeouts are not too long. Shortening the timeouts will allow the allow the EMC to release the bus faster if something is accessing it too long while another access is pending. It usually works in favor of the LCD with a high clock rate as the LCD data burst usually can easily meet the timeout requirements, but can slow other things down in the system.

The 800x600 display has a clock rate of about 38MHz? That should be ok with 16bpp and at least the EMC bus timeouts set to around 0x20. Other customers have used 800x600 and 800x480 without problems (and using Linux) at 16bpp in production systems.

I guess I"m trying to say the pixel clock rate and data transfer per clock are more important than the display size. As a general rule of thumb, I would never go over over a 40MHz pixel clock at 16bpp or a 20MHz pixel clock with 32bpp. (This is with a 133MHz DRAM bus with 16-bit DDR or 32-bit SDR DRAM). I hope this helps.

BPP-420 understands traditional control codes, such as Tab LF/CR FF/Clear Backspace etc. Additional features are mapped to other control codes or Escape sequences. A quick summary:

This is an intro to the FPD-Link display interface, commonly used in laptop and monitor LCD panels. Information surrounding the exact nature of this interface is scattered all over the internet, so I wrote this article to try and make it easier to understand, and potentially useable in your own projects!

FPD-Link is also known as simply "LVDS", although this is technically incorrect since this refers to just the electrical interface, and LVDS is used for many other interfaces too. The actual interface is called FPD-Link (or also FlatLink by some manufacturers), and describes a general interface for connecting LCD panels to graphics controllers, much like VGA or DVI. However it doesn"t describe an exact data format, so many different options exist for different panels, making it not quite as inter-operable as VGA or DVI.

Fortunately you"ll find most (old) laptop LCD panels will use a de-facto format, so it"s actually not too hard to re-use the screens out of that old stack of laptops you have in the basement!

Flat Panel Display Link (FPD-Link) was created by National Semiconductor as a free and open standard for connecting the output of a GPU or video processor to an LCD panel"s timing controller. It superseeds TTL/CMOS parallel interfaces which were very limited in the resolution they could achieve[1]. Although FPD-Link itself is becoming outdated with the rise of next generation LCD monitors (2440p and 4K!), it is still used in most current generation laptops and desktop monitors. You can read more about the FPD-Link standard in Texas Instruments" app-note[2].

The protocol itself is fairly straight-forward; there"s no complex control/configuration/packetization of the video data, and usually a panel will accept any resolution given to it since it relies on horizontal and vertical synchronization signals like most other video interfaces (See the Synchronization & Timing Section for how this works).

At it"s core, FPD-Link uses a number of Low-Voltage Differential Signalling (LVDS) pairs in order to transfer video data over a high speed link, which is then de-serialized in the LCD panel and used to drive the display. Even though it has less wires than a parallel interface, it allows for much higher speeds due to increased noise tolerance and capabilities of the LVDS pairs (much like how SATA proivdes faster speeds for hard disks than IDE/PATA).

FPD-Link serializes this data into channels containing 7 bits of data per clock cycle, as shown in Figure 2. For a typical video interface with 18 bits per pixel (bpp), there are 21 bits of data per clock serialized into a total of 4 LVDS channels (3 data + 1 clock, or "3D+1C"). There are of course many other configurations possible depending on the number of links and data bits. For example, a dual-link 24 bpp interface (common in desktop monitors) would use 2x 4 LVDS data channels + 2 LVDS clock channels, or "8D+2C". Looking at the pairs of wires on the LCD"s circuit board can provide a very good hint as to which format it uses!

The actual layout of bits in this serial stream varies depending on how the manufacturer has decided to implement it, and is described in the Data Framing section below. For 18 bpp displays there is only one specfic format used, but FPD-Link itself is not limited to just 18 bpp video.

Most old laptop LCDs will likely be 18 bits per pixel (6 bits per colour), and thus use 3 LVDS data pairs and 1 LVDS clock pair (3D+1C). A total of 21 bits are serialized, and the layout inside the LVDS stream is shown in the following timing diagram:[4] [5]

Some panels will support 24 bpp (8 bits per colour), which uses a fourth LVDS data pair (4D+1C) to increase the bit depth while keeping the bandwidth the same. Unfortunately there are two different standards for how the data is serialized for 24 bpp panels! The difference is which bits the fourth data channel (Y3) contains, and it may either contian the least significant bits (LSB) or most significant bits (MSB) of the pixel. According to Texas Instruments, most 24 bit panels assume the MSB is in the 4th channel[3], although contradicting info says that 24 bit LSB panels are the most common[4]. So if in doubt, check your datasheet! The two different formats are shown in the following timing diagrams:[4] [5]

Note that an 18 bpp panel can be driven by a 24 bpp LSB transmitter by simply omitting the 4th channel (Y3), in which case the lower bits are discarded and it acts as if it was transmitting 6 bits per colour. You cannot drive an 18 bpp panel from a 24 bpp MSB transmitter![4]

Some transceivers may even support 30 bit RGB data[6], which use an additional channel (5 LVDS data channels in total). I"m unsure on the exact format of this data as I don"t have any 30 bit LCD panels.

Dual-channel FPD-Link uses a second FPD-Link, sending even pixels on one and odd pixels on the other in order to double the effective bandwidth, thus supporting higher resolutions (eg. 1920x1080@60Hz). Usually two identical clocks are sent for both FPD-Links (8D+2C). Again, this can be 18 or 24 bpp (or higher). According to Texas Instruments there is only one de-facto mapping for dual-channel 24 bit mode[5] (MSB Format):

The data framing format is only half the story when interfacing with an FPD-Link display; the synchronization and timing are also important to ensure the pixels the panel receives actually match the physical panel! This is done through the HSYNC, VYSNC, and DE synchronization signals. It"s not immediately obvious, but not all pixels transmitted are actually displayed - some end up in the so called "blank-time" interval. This is a leftover artifact from the days of CRT monitors when the electron beam actually needed time to move between rows and frames![7] For backwards compatibility the blank-time is still present in DVI & VGA outputs, which is sad because it"s not required at all in digital panels!

If you have a datasheet for your LCD panel, it will usually include a timing diagram specifying the values you should use to display a valid picture. This information is also reflected in the panel"s EDID (if present). Generally this information can be represented in the form of a Coordinated Video Timing (CVT), a VESA standard specifying common timing formats for different resolutions[9].

Digital Visual Interface (DVI) is actually very similar to FPDLink, in that it uses the exact same data framing format (RGB pixel data + HSYNC/VSYNC/DE). However it uses Transition-Minimized Differential Signalling (TMDS) not LVDS, so it is not electrically compatible[10]. The digital encoding of data is also different, as it uses a special encoding algorithm to convert the 11 bit inputs to 10 bit codes. The DVI video stream is always 24 bpp, and contains various control signals including HSYNC, VSYNC, and ENABLE (DE)[11]. This makes it fully compatible with FPD Link, with an appropriate converter chip!

Some next-gen monitors are moving to a eDP (embedded Display Port), which is pretty much just display port, so it is possible to connect such a display directly to a display port capable video card. I will not go into more detail about it here since I don"t have any of these types of display panels, and my computer doesn"t have display port anyway! However I have heard you can obtain iPad displays cheaply online which use eDP, and can be used as a secondary high-DPI monitor with a simple re-wired display port cable and backlight driver.[12] [13] [14]

MIPI DSI is another protocol widely used in current-gen smartphone/tablet LCDs. It is lower power than FPD-Link and supports higher resolutions. Unfortunately the standard isn"t available to the public so it"s shrouded in mystery, although I have seen one project successfully interface such a display through the use of an FPGA[15], and another project reverse engineering the iPod nano LCD[16]. The popular Raspberry Pi also has a MIPI DSI connector for driving an LCD, but as of the time of writing there is no information on how to use it.

Extended Display Identification Data (EDID) is used as a way to tell the host computer how to drive the panel, and what formats it supports[17]. It"s simply a 256 byte EEPROM chip that communicates over I2C, and both VGA and DVI cables provide signals for this. It makes it possible to connect a panel to a computer and have the computer automatically know what resolution it should output.

This makes re-using an LCD panel a lot easier, since the computer will know exactly how to drive your panel! (provided you have an appropriate LVDS driver)

DISCLAIMER: Reverse-engineering is tricky buisiness. You may permanently damage either your panel or laptop, so don"t do it on anything important! You are responsible for your own safety.

If you don"t have a datsheet for your LCD panel, it is still possible to re-use it with some reverse-engineering skills. This is easiest if you have the LCD connected to a working laptop so you can probe the signals.

The LVDS wires should also be easy to locate - they are always routed as pairs on the PCB, and the wires may be twisted or shielded. For a laptop LCD there should be 3-4 pairs.

There are two main types of backlighting in LCD panels: CCFL (Flurorescent), and LED. CCFL was widely used in older laptops before LED backlights came around, and are pretty obvious because you will find a large inverter module with a transformer on it, probably covered in "Warning: High Voltage!" stickers. These transformers usually have multiple pins: +V, GND, and Enable/Dimming pins. +V is usually either +12V or +5V.

LED backlights result in much thinner displays, and usually need a dedicated driver, which may or may not be built into the LCD panel. LED backlights may be split into an Anode and several Cathode wires, consiting of several "strings" of LEDs.

Start by disconnecting the power supply & backlight and connecting it to your own supply (with the LVDS still connected to your laptop if possible). You should hopefully see some change in appearance of the panel.

If you want to use an LVDS LCD panel with a computer or SBC, you will need to find a way to interface it with your device. Since most computers/SBCs don"t have LVDS outputs, you will probably need an HDMI/DVI to LVDS converter board. Here are some options for interfacing:

Apparently you can ask the seller to match the driver board to your LCD"s datasheet, although I"ve never tried this. It should mostly just work with your panel provided it has an EDID chip.

In all the above cases you will need to ensure the data format of your LCD panel matches the data format of your LVDS driver. As mentioned earlier, the most common format for old LCD panels is 18bpp (3D+1C), which is compatible with a 24bpp LSB driver (since the 4th output channel Y3 can be ommitted)

China"s first 8.5-generation TFT-LCD production line was launched in Bengbu, East China"s Anhui province, on June 18, 2019, representing a breakthrough in the production of high-definition LCD screen, Science and Technology Daily reported.

TFT-LCD, or Thin Film Transistor Liquid Crystal Display, is key strategic material of the electronic information display industry. The Gen 8.5 TFT-LCD production line, launched by the Bengbu Glass Industry Design and Research Institute of the China National Building Material Group, will produce high-definition LCD screens of 55 inches, the report said.

According to the Liquid Crystal Branch of the China Optics and Optoelectronics Manufactures Association, the demand for TFT-LCD in the Chinese mainland was about 260 million square meters in 2018, including 233 million square meters" Gen 8.5 TFT-LCD. However, the annual supply of domestically made TFT-LCD is less than 40 million square meters, with all of them Gen 6 or below, which cannot meet the demand in scale and quantity.

The association predicted that China"s market demand for Gen 8.5 TFT-LCD or above will exceed 300 million square meters by 2020, accounting for 49.6 percent of the total global demand.

The production and control precision of Gen 8.5 TFT-LCD is comparable to that of the semiconductor industry, representing a higher level of large-scale manufacturing of modern glass industry.

The institute in Bengbu, with 60 years of expertise in glass, has finally made a breakthrough in the production of Gen 8.5 TFT-LCD, and will provide key raw material guarantee for China"s LCD panel industry after it goes into mass production in September, the report said.

Intel® NUC 11 Performance Kits NUC11PAQ/H/K[x] and Intel® NUC 11 Performance Kits NUC11PAH[x]Z have the following:One HDMI port (2.0a-compliant, HDCP 2.3) -> back panel connector.