tft lcd 氇媹韯?0 factory

4389 9 1 A7 I " __^1_B7_ _ 五、發明説明（1 ) 本發明係關於薄膜元件之製造方法，有源矩陣基板， 液晶顯示裝置，有源矩陣基板之製造方法，以及含在液晶 顯示裝置之有源元件之靜電破壞防止方法。 在有源矩陣方式之液晶顯示裝置，係在各畫素電極連 接轉接元件，而介由該轉接元件轉接各畫素電極。 轉接元件可使用，例如薄膜電晶體（T F T ) ^ 薄膜電晶體之構造與動作，基本上是與單結晶矽之 Μ 0 S電晶體相同。 使用無定形矽（α - S i )之薄膜電晶體有幾種習知 之造，但一般常使用的是，閘極在無定形矽膜下方之底閘 構造（反交錯構造）之薄膜電晶體。 製造薄膜電晶體時，最重要的是，減少製造過程，並 確保很高之製成率。 經濟部中央標準局貝工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁} 同時，從製造有源矩陣基板之過程中發生之靜電引起 之破壞，有效保護薄膜電晶體也是很重要。從靜電氣破壞 保護薄膜電晶體之技術記載於，例如日本國之實開昭 6 3 - 3 3 1 3 0 號之 Micro Film 或特開昭 6 2 — 187885號公報。 本發明之目的之一是在提供，能夠減少薄膜電晶體之 製造過程數，且可靠性很高之新穎之薄膜元件之製造處理 技術。 本發明之另一個目的是在提供，備有，利用該製造處 理技術，而以不致使製造過程複雜化之情況下形成具有充 分之靜電保護能力之保護元件之有源矩陣基板，以及液晶 本纸張尺度適用中囷國家標準（.CNS ) A4規格（2丨Ox297公釐） 43899 1 4 五、發明説明（2 ) 顯示裝置。 本發明之其他目的是在提供1能夠防止含在T F T基 板之有源元件（T F T )之靜電破壞之靜電破壞防止方法 a 本發明薄膜元件之製造方法之可取形態之一是。在製 造底閘構造之薄膜文件時，其製造過程包含： 形成覆蓋源極層，吸極層以及閘極材料層之保護膜之 過程。 然後選擇式蝕刻存在於閘極層或閘極材料層上之閘極 絕緣膜及保護膜之重叠膜之一部分，形成露出閘極層或閘 極材料層之表面之一部分之第1開□部，同時選擇式蝕刻 源極層或吸極層上之保護膜之一部分，形成露出源極層或 吸極層之表面之一部分之第2開口部之過程》 其後，經由第1或第t開口部，將導電性材料層連接 在閘極層、閘極材料層，源極層、吸極層之至少一方之過 程。 經濟部中央標準局員工消費合作社印製 (讀先聞讀背面之注意事項再填寫本頁) 依照上述之薄膜元件之製造方法時，絕緣膜之選擇性 .蝕刻可以統籌爲之。因此可以將形成供外部連接端子連接 於電極之開口部之過程，及形成供內部配線連接到電極之 開口部之過程共同化，因而得減少過程數。 至於「導電性材料層J ，最好是使用IT〇（4389 9 1 A7 I "__ ^ 1_B7_ _ 5. Explanation of the invention (1) The present invention relates to a method for manufacturing a thin film element, an active matrix substrate, a liquid crystal display device, a method for manufacturing an active matrix substrate, and a liquid crystal display device Method for preventing electrostatic destruction of active components. In an active matrix liquid crystal display device, a switching element is connected to each pixel electrode, and each pixel electrode is switched through the switching element. The transfer element can be used, for example, thin film transistor (T F T) ^ The structure and operation of the thin film transistor are basically the same as the M 0 S transistor of single crystal silicon. There are several known thin-film transistors using amorphous silicon (α-S i), but thin-film transistors with a gate structure (inverse staggered structure) with a gate below the amorphous silicon film are commonly used. When manufacturing thin-film transistors, the most important thing is to reduce the manufacturing process and ensure a high yield. Printed by the Central Standards Bureau of the Ministry of Economic Affairs, Shelley Consumer Cooperative (Please read the precautions on the back before filling out this page} At the same time, it is also important to effectively protect thin-film transistors from the damage caused by static electricity that occurs during the manufacture of active matrix substrates Techniques for protecting thin-film transistors from static electricity are described in, for example, Japanese Unexamined Patent Publication No. 6 3-3 3 1 3 0 or Japanese Unexamined Patent Publication No. 6 2-187885. One of the objects of the present invention It is to provide a novel thin film element manufacturing process technology that can reduce the number of thin film transistor manufacturing processes and has high reliability. Another object of the present invention is to provide, prepare, and use the manufacturing process technology to Without complicating the manufacturing process, an active matrix substrate with protective elements with sufficient electrostatic protection capabilities, and the liquid crystal paper standards are applicable to China National Standard (.CNS) A4 specifications (2 丨 Ox297 mm) 43899 1 4 V. Description of the invention (2) Display device. Another object of the present invention is to provide a device capable of preventing static electricity of an active element (TFT) included in a TFT substrate. Method for preventing destruction of static electricitya One of the preferable forms of the method for manufacturing the thin film element of the present invention is that when manufacturing a thin-film file with a bottom gate structure, the manufacturing process includes: forming a cover source layer, an attracting layer, and a gate material layer The process of protective film. Then selective etching of a part of the gate insulating film and the overlapping film of the protective film existing on the gate layer or the gate material layer to form a part of the surface exposing the gate layer or the gate material layer The first opening is a process of simultaneously etching a part of the protective film on the source layer or the attractor layer to form a second opening that exposes a part of the surface of the source layer or the attractor layer. 1 or t opening, the process of connecting the conductive material layer to at least one of the gate layer, gate material layer, source layer, and sink layer. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (read first news) (Please read the precautions on the back and fill in this page again.) When following the above-mentioned thin-film element manufacturing method, the selectivity and etching of the insulation film can be coordinated. Therefore, the formation of external connection terminals can be made. In the process of the opening portion of the electrode, and is connected to the internal wiring for forming an opening portion of the process electrodes in common, thereby reducing the number of processes available. As for the "J electrically conductive material layer, is preferably used IT〇 (

I B7 五、發明説明u ) 門檻值電壓（V t h )。因此可以降低不必要之漏洩電流 。同時，薄膜元件之製造過程數減少，製造很容易。 「畫素電極」及「與畫素電極同一材料製成之導電層 」最好使用I TO膜》除了 I TO膜以外，如金屬氧化膜 等觸點高之其他透明電極材料也可以使用。例如S η Ο X ，ZnOx等之金屬氧化物。 在本發明之有源矩陣基板之可取型態之一是，上述「 與掃描線及信號線中之至少一方在電氣上等效之部位」， 係連接外部連接端子用之電極（pad)，而上述之「共 同電位線」係以交流驅動液晶時供應成爲基準之基準電位 之線（LC 一 COM線〕，或在製造液晶顯示裝置之階段 中，將連接外部端子用之電極共同連接起來，使其成爲相 同電位之線（保護環）。 保護環係在液晶顯示裝置之製造階段中，作爲靜電對 策而配設.在電極（p a d)外側之線。L C 一 COM線及 保護環均爲共同電位線，因此，如果在電極與此等線之間 連接保護用之二極體，便可以將靜電引至這些線。 經濟部中央標準局員工消费合作社印製 (請先閲讀背面之注意事項再填寫本頁) 而在本發明之有源矩陣基板之可取型態之一是，「靜 電破壞防止用保護構件」，係設在，連接外部端子用之電 極（p a d )與以交流驅動液晶時供給當作基準之基準電 位之線（L C — COM線）之間，以及，連接外部端子用 之電極與共同連接以連接外部端子之電極使成同電位之線 (護衝環）之間之雙方。 保護環會在貼合T F T基板與相對之基板（彩色濾波 本紙張尺度適用中國國家標準（CNS ) A4規格（210父297公釐> -7 - A7 B7 438991 五、發明説明（5 ) 基板）後，在連接驅動用1 c之前被切斷掉’但1- C_ . C 0M線會一直殘留在最終製品內。因此，上述架構在切 (請先閲讀背面之注意事項再填寫本頁) 斷基板後，連接I C前’晝素部之TFT可以受到保護免 受靜電破壞，因此可以提昇對製品之可靠性。 同時，對最終製品也會殘留有保護用二極體’因此實 際使用製品時之靜電破壞強度也會提高。而且是使用 TFT之保護用二極體’因此門檻值（V t h)之控制很 容易，漏洩電流也可以降低’因此二極.體殘存在最終製品 體也不會有不良影響。 同時，本發明之有源矩陣基板之製造方法之可取型態 之一是，靜電破壞防止用保護構件具備有，共同連接第1 二極體之陽極與第2二極體之陰極，並共同連接上述第1 二極體之陰極與上述第2二極髖之陽極，所構成之雙方向 性之二極體。 因爲是雙方向性之保護用二極體，可以保護T F T不 受正極性及負極性之突波之傷害》 同時，本發明之液晶顯示裝置係使用本發明之有源矩 經濟部中央標準局貢工消費合作杜印製 陣基板構成。因爲有源矩陣基板之畫素部之有源元件（ TF Τ)之靜電破壞可獲得確實之防止，因此液晶顯示裝 置之可靠性也會提高。 同時I本發明之有源矩陣基板之製造方法之可取型態 之一是，在形成底閘構造之TFT時，包括有， 形成同一材料之源極、吸極層，同時在絕緣膜上之一 定領域，形成輿源極、吸極層同一材料構成之源極、吸極 本紙張尺度適用中國國家標準（CNS ) Μ規格（210X297公釐） -8 ™ A7 43 89 9 1 ___B7_ 五、發明説明（6 ) 材料層之過程， (請先閲讀背面之注意事項再填寫本頁} 形成可覆蓋源極、吸極層，以及源極，吸極材料層之 保護膜之過程， 選擇性蝕刻存在於閛極層或閘極材料層上之閘極絕緣 膜及保護膜之重疊膜，形成可以使閘極層或閘極材料層之 表面之一部分露出之第1開口部，同時，選擇式蝕刻源極 、吸極或源極、吸極材料層上之保護膜，形成可使源極、 吸極或源極 "吸極材料層之表面之一部分露出之第2開口 部之過程，及 經由第1或第2開口部，將導電性材料層連接到閘極 ，閘極材料層，上述源極、吸極層或上述源極、吸極材料 層之過程。 依據上述薄膜元件之製造方法時，絕緣膜之選擇式蝕 刻係統籌一次爲之。固之可以將，形成可以將外部端子連 接到電極之開口部之過程，及形成可以將配線連接到電極 之開口部之過程共同化，而得減少過程數β 經濟部中央標隼局員工消費合作社印製 此製造方法也可應用在靜電保護元件之MO S二極體 之形成。亦可利用在電極附近之交童（cross under)配線 。所謂「交疊配線」係指，當將液晶顯示裝置之內部配線 引出密封材料外側時|爲了保護很厚之層間絕緣膜之配線 ，將上層之配線連接到下層之配線，迂迴引出部時所用之 配線。 上述「導電性材料層」以使用跟畫素電極相同之材料 爲佳。藉此可在形成畫素電極之同時也一併形成由導電性 k張尺度適用中國國家標孪（CNS ) A4規格（210X 297公釐) ~ ~~ 一 9 一 A7 B7 43 89 9 五、發明説明（7 ) 材料所成之配線。 上述「導電性材料層J最好使用I T 0「Indcium Tin Oxidej膜。除了 I TO膜以外，也可以使用如例金 屬氧化膜之融點髙之其他透明電極材料。 同時•本發明之有源矩陣型液晶顯示裝置之靜電破壞 防止法之可取型態之一是，將雙方向二極體構成之靜電破 壞防止用保護構件，連接在掃描線與信號線中之至少一方 ，或在踉該線在電氣上等效之部位與共同電位線之間，藉 此防止含在液晶顯示裝置內之有源元件受到之靜電破壤 如此，可以確實防止含有在源矩陣基板之有源元件（ TFT)之靜電破壞。 茲參照附圖說明本發明之實施形態如下。 (第1實施態） 第1圖〜第6圖表示本發明之薄膜元件（底閘構造之 T F T )之製造方法之一個例子，係每一過程之元件之截 面圖。 (各製造過程之內容） (過程1 ) 如第1圖所示，利用光手版印刷技術在玻璃基板（無 鹼基板）2上形成，例如1 3 0 0A程度之厚度之c r所 構成之閘極4a，以及閘極材料層4b，4c。閘極4a 係在畫素部矩陣狀形成之底閘構造之T F T之閘極。而閘 表紙張尺度適用中國國家標準（CNS > A4規格（210X 297公釐）I B7 V. Description of the invention u) Threshold voltage (V t h). Therefore, unnecessary leakage current can be reduced. At the same time, the number of manufacturing processes of the thin film element is reduced, and manufacturing is easy. "Pixel electrode" and "Conductive layer made of the same material as the pixel electrode" It is best to use I TO film "In addition to I TO film, other transparent electrode materials such as metal oxide film can be used. For example, S η OX, ZnOx and other metal oxides. In one of the preferable forms of the active matrix substrate of the present invention, the above-mentioned "parts which are electrically equivalent to at least one of the scanning line and the signal line" are electrodes (pads) for connecting external connection terminals, and The above-mentioned "common potential line" is a line (LC-COM line) that is used as a reference potential when liquid crystal is driven by AC, or in the stage of manufacturing a liquid crystal display device, electrodes for connecting external terminals are connected together so that It becomes the line with the same potential (protective ring). The protective ring is provided as a countermeasure against static electricity in the manufacturing stage of the liquid crystal display device. The line on the outside of the electrode (pad). The LC-COM line and the protective ring are common potentials Therefore, if a protective diode is connected between the electrode and these wires, static electricity can be induced to these wires. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling in (This page) One of the preferable forms of the active matrix substrate of the present invention is that the "protective member for preventing electrostatic damage" is provided on the electrode for connecting the external terminal ( pad) and a line (LC — COM line) which is used as a reference potential when the liquid crystal is driven by AC, and an electrode for connecting external terminals and an electrode connected in common for connecting external terminals are formed into a line of the same potential ( Protective ring) The protective ring will be attached to the TFT substrate and the opposite substrate (color filter This paper size applies the Chinese National Standard (CNS) A4 specification (210 parent 297 mm > -7-A7 B7 438991) V. Description of the invention (5) Substrate), it will be cut off before connecting the drive 1c ", but the 1-C_. C 0M line will always remain in the final product. Therefore, the above structure is cutting (please read the back first) (Notes for filling in this page again) After the substrate is disconnected, the TFT in the daytime unit before the IC can be protected from static electricity, so it can improve the reliability of the product. At the same time, there will be protection for the final product. The polar body "so that the electrostatic breakdown strength will be improved when the product is actually used. And it is the protection diode using TFT". Therefore, the control of the threshold (V th) is easy, and the leakage current can be reduced. There is no adverse effect on the final product body at the same time. At the same time, one of the preferable forms of the manufacturing method of the active matrix substrate of the present invention is that the protective member for preventing electrostatic damage is provided and is connected to the first diode in common. The anode of the body and the cathode of the second diode are connected together to connect the cathode of the first diode and the anode of the second diode to form a bidirectional diode. Because it is a bidirectional The protection diode can protect the TFT from the positive and negative polarity surges. At the same time, the liquid crystal display device of the present invention is printed using the tribute-consumer cooperation of the Central Standards Bureau of the Ministry of Active Economics of the present invention. Array substrate structure. Since the electrostatic destruction of the active element (TF T) of the pixel portion of the active matrix substrate can be reliably prevented, the reliability of the liquid crystal display device will also be improved. At the same time, one of the preferable forms of the manufacturing method of the active matrix substrate of the present invention is that when forming a TFT with a bottom gate structure, it includes forming a source and an attracting layer of the same material, and a certain amount on the insulating film. In the field, the source and sink electrodes formed by the same material as the source and sink layers are made in accordance with Chinese National Standards (CNS) M specifications (210X297 mm) -8 ™ A7 43 89 9 1 ___B7_ V. Description of the invention ( 6) The process of the material layer, (Please read the precautions on the back before filling out this page} The process of forming a protective film that can cover the source, sink layer, and source and sink material layers, selective etching exists in 閛An overlapping film of the gate insulating film and the protective film on the electrode layer or the gate material layer forms a first opening portion that can expose a part of the surface of the gate layer or the gate material layer. At the same time, the selective etching source electrode, The process of forming the second opening portion of the surface of the source, sink, or source electrode"s material layer by forming a protective film on the source, source, or source material layer, and via the first or second 2 openings with conductive material The layer is connected to the gate, the gate material layer, the source, the sink layer, or the source and the sink material layer. According to the manufacturing method of the thin film element described above, the selective etching system of the insulating film is prepared once. The process of forming and connecting the external terminal to the opening of the electrode and the process of connecting the wiring to the opening of the electrode can be reduced to reduce the number of processes. Cooperative printed this manufacturing method can also be applied to the formation of MO S diodes of electrostatic protection elements. Cross under wiring near the electrodes can also be used. The so-called "overlapping wiring" refers to when the liquid crystal display When the internal wiring of the device is led out of the sealing material | In order to protect the wiring of the thick interlayer insulating film, connect the upper wiring to the lower wiring, and use the wiring when detouring the lead-out. The above "conductive material layer" is used to follow the picture It is better to use the same material as the element electrode. This can form the pixel electrode and also form a conductive k-sheet scale suitable for the Chinese national standard (CNS). ) A4 size (210X 297 mm) ~ ~~ 9 9 A7 B7 43 89 9 V. Description of the invention (7) Wiring made of materials. The above "conductive layer J is best to use IT 0" Indcium Tin Oxidej film In addition to the I TO film, other transparent electrode materials such as the melting point of a metal oxide film can also be used. At the same time • One of the preferable forms of the electrostatic destruction prevention method of the active matrix liquid crystal display device of the present invention is, A protection member for preventing electrostatic damage composed of a bidirectional diode is connected to at least one of the scanning line and the signal line, or between an electrically equivalent portion of the line and a common potential line, thereby preventing the In this way, the electrostatic breakage of the active elements in the liquid crystal display device can prevent the electrostatic destruction of the active elements (TFTs) contained in the source matrix substrate. Embodiments of the present invention are described below with reference to the drawings. (First Embodiment) Figs. 1 to 6 show an example of a method of manufacturing a thin film element (bottom gate structure T F T) of the present invention, and are sectional views of the element in each process. (Contents of each manufacturing process) (Process 1) As shown in Fig. 1, a light gate printing technique is used to form a glass substrate (alkali-free substrate) 2 on the glass substrate, for example, a gate made of cr having a thickness of about 1 300 A. Electrode 4a, and gate material layers 4b, 4c. The gate 4a is a gate of the T F T of the bottom gate structure formed in a matrix form in the pixel portion. And the paper size of the brake meter applies the Chinese national standard (CNS > A4 specification (210X 297mm)

丁 (請先閲讀背面之注意事項再填寫本頁〕" 經濟部中央標準局員工消費合作社印製 43899 1 Λ7 --------- 五、發明説明（8 ) 極材i層4j^形成後述之靜電破壞防止用保護元件之領 ..... . . ... · 一 I —III· Μ ――雙。而鬧極材料層4 c係用以形成與外部之連接用或檢査 用之端子之領域， (請先聞讀背面之注意事項再填寫本頁) 然後’藉電漿CVD法，連續形成由矽氮化膜 SiNx等構成之閘極絕緣膜6,未摻雜不純雑質之真性 無定瑕砂膜8 ’以及η型矽膜（電阻接觸層）1〇，接著 ’藉照相蝕刻術使真性無定形矽膜8與η型矽膜（電阻接 觸層）1 0小島化。 這時’閛極絕緣膜6之厚度爲，例如3 0 0 0Α前後 ’真性矽膜8之厚度爲，例如3 0 0 0Α前後，電阻接觸 層1 0之厚度爲，例如5 0 0Α前後。 在此過程之特徵是，不形成對閘極絕緣膜之接觸孔· (過程2 ) 其次’如第2圖所τκ，藉彌射（Spattering)或照相 蝕刻’形成例如由C r構成之1 3 0 0A前後之源極、吸 極 1 2 a，1 2 b。 經濟部中央標準局員工消費合作社印製 (過程3 ) 接著如第3圖所示，將源極、吸極12a ，12 b當 作掩蔽使用，藉蝕刻去除電阻接觸層1 0之中央部分，以 分離源極、吸極（分離触刻）。這時能夠在同一室內連績 進行源極、吸極之圖型化之蝕刻與分離蝕刻。 亦即，先以C 系之蝕刻氣體進行源極、吸極 本紙張尺度適用中國國家標率（CNS ) A4規格（2ί〇Χ297公釐） -11 - 經濟部中央標準局員工消费合作社印製 43 89 9 1 at B7 五、發明説明（9 ) 1 2 a，1 2 b之蝕刻，接著將蝕刻氣體切換爲s Fβ系. 之氣體，進行電阻接觸層1 〇之中央部位之蝕刻。 (過程4 ) 其次如第4圖所示，例如以電漿CVD法形成保護膜 i 1 4。此保護膜1 4係例如2 Ο Ο 0A前後之矽氮化膜（ S i N X )。 (過程5 ).. 其次，如第5圖所示，在保護膜1 4之一部分形成， 連接外部端子（搭接線或I C之外部引線等）用之開口部 20，同時形成接觸孔16，18» 開口部2 0及接觸孔1 8係貫穿閘極絕緣膜6及保護 膜1 4之重疊膜而成。接觸孔1 6係僅貫穿保護膜1 4而 成。 在形成開口部2 0與接觸孔16 ，1.8時，閘極材料 層4 b，4 c分別發生蝕刻阻擋層之作用。而在形成接觸 孔1 6時，源極、吸極1 2 b則成爲蝕刻阻擋層。 (過程6 ) 然後如第6圖所示，以5 0 0A前後之厚度沉積 I Τ Ο ( Indium Tin Oxide)膜，經選擇式独刻*形成由 ITO構成之配線22a及電極22b。 ITO之蝕刻係 利用H C 5/HN 03/H20之混合液之濕式蝕刻爲之。 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） (請先閱讀背面之注意事項再私寫本頁) -訂 12 A7 B7 438991 五、發明説明（ίο ) 如上述，開口部2 0及接觸孔1 8係貫穿閘極絕緣膜 6及保護膜1 4之重疊膜而成。因此成爲兩層絕綠膜厚度 之很深之接觸孔》 (請先閲讀背面之注意事項再填寫本頁) 惟因I TO之融點很高，其級層涵蓋性較鋁金屬好， 因此經由很深之接觸孔時也不會造成接觸不良。再者，除 了 I TO以外，也可以使用例如金屣氧化物之觸點高之其 他透明電極材料。例如SnOx，2nOx等金屬氧化物 也可以使用。這時，級層涵蓋性仍可符合實際使用。 如此製成之底閘構造之TFT被用在，例如，有源矩 陣基板之畫素部之轉接元件。同時由IT◦形成之電極 2 2 b則成爲連接外部端子（I C之外部引線等）之墊片 (pad) 〇 (本製造方法之特徵） 經濟部中央標準局員工消費合作社印製 第7圖A〜第7圖F係表示第1圖〜第6圖所記述之 本實施形態之TF T之製造過程》另一方面，第8圖A〜 第8圖G係表示對比例子之T F T之製造過程。此對比例 子係爲了明確表示本實施形態之T F T之製造方法之特徵 ，由本發明人等想出，而非傳統例子。 對比例子之第8圖A與第7圖A相同。 在第8圖A〜第8圖G，與第7圖A〜第7圖F相同 之部分標示相同記號。’ 對比例子係如第8圖B所示，在形成吸極層以前’先 形成接觸孔ΚΙ ，K2。 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇Χ297公釐） 4389 9 1 A7 經濟部中央標準局貝工消費合作社印製 B7 五、 發明説明（ 11) 1 | 而 如 第 8 圖 C 所 示 j .形 成 源 極 、 吸 極 層 1 2 a 1 1 1 | 1 2 b ♦ 以 及 相 同 材料 之 源 極 吸 極 材 料 層 1 2 C 9 1 1 2 d α Μ 1 請 j 然 後 如 第 8 圖 D 所 示 S 形 成 I T 〇 膜 3 0 ύ 先 閲 1 I 接 著 如 第 讀 i I 8 圖 E 所 示 ) 在 電 阻 接 觸 層 1 0 之 中 央 部 進 背 面 1 之 行 蝕 刻 ( 分 酿 離 蝕 刻 ) 0 注 意 1 | 其 次 如 第 8 圖 F 所 示 ， 形 成 保 護 膜 4 0 0 事 項 真 Ί 最 後 9 如 第 8 圖 G 所 示 t 形 成 開 □ 部 K 3 0 藉 此 使 $ 窝 I 源 極 <k 吸 極 材 料 層 1 2 d 之 表 面 露 出 > 形 成 用 來 連 接 外 部 1 1 端 子 之 電 極 ( P a d ) 0 1 1 依 據 上 述 之 對 比 例 子 之 製 造 方 法 時 在 第 8 圖 B 之 接 1 1 觸 孔 之 形 成 過 程 外 有 加 上 第 8 圖 G 之 形 成 開 □ 部 K 3 之 訂 I 過 程 共 計 需 要 兩 個 開 □ 部 之 形 成 過 程 〇 1 1 對 此 本 實 施 形 態 之 製 造 方 法 係 如 第 7 \ et 1 圖 Ε 所 示 統 1 I I 籌 一 次 形 成 開 □ 部 1 6 1 8 2 0 〇 亦 即 1 在 貫 穿 保 護 1 1 膜 1 4 及 閘 極 絕 綠 膜 6 之 重 疊-膜 形 成 開 □ 部 之 同 時 1 在 源 1 極 吸 極 層 1 2 b 上 也 形 成 保 護 膜 1 4 之 Γ«ΐ 圖 型 因 而 開 P 1 1 部 之 形 成 過 程 僅 — 次 即 可 〇 曝 光 過 程 也 可 以 減 少 一 次 〇 因 1 i 而 可 以 免 掉 光 阻 蝕 刻 膜 之 沉 m 過 程 及 其 触 刻 過 程 〇 因 此 共 1 縮 減 三 個 Μ 程 0 亦 即 可 簡 化 製 造 程 序 0 I 同 時 t 本 實 施 例 之 製 造 方 法 可 以 連 績 在 同 _~* 室 內 進 行 1 第 7 i q.l 圖 Β 所 示 之 源 極 吸 極 層 1 2 a 1 2 b 之 rwt 圖 型 化 ( 1 1 乾 式 蝕 刻 ) * 及 第 7 圓 C 所 7S< 之 電 阻 接 觸 層 1 0 之 中 央 部 位 之 蝕 刻 ( 乾 式 蝕 刻 ) 〇 亦 即 在 同 — 室 内 依 序 切 換 蝕 刻 1 1 本紙張尺度適用中國國家標準（CNS ) A4规格（21〇Χ297公菠） -14 — 經濟部中央標準局貝工消費合作社印製 4 3 8 9 9 1 B7 五、發明説明（12 ) 氣體，便可連續蝕刻。 對此，對比例子之I τ ◦層3 0與源極、吸極1 0 a 10b屬同一層。即，，兩者成積層狀’其間無保護膜。 因而在基板上之其他領域（未圖示）有異物存在時’便有 可能使本來應該絕緣之I T Ο膜構成之配線’源極、吸極 層，及同一材料形成之配線或電極發生短路現象。亦即， 本實施形態之製造方法形成之元件之可靠性較高° 同時，對比例子因在較早之階段形成I TO膜_3 0 ( 第8圖D)，在其後之過程有可能受到I TO之組成物之 1 η或Sn等之污染 對此，本實施形態之製造方法，ΪΤΟ膜22a ， 2 2 b係在最後之過程形成，因此被I TO之組成物之 5 η污染之可能性很少。 如此，依據本實施形態之製造方法時，可縮減製造過 程，而且可製成可靠性很高之元件。 (第2實施形態） 其次再參照第9圖〜第1 8圖，說明本發明之第2實 施形態。 第9圖係表示本發明第2實施形態之有源矩陣基板之 平面配置圖。 第9圖之有源矩陣基板係使用在液晶顯示裝置。畫素 部之轉接元件及靜電破壞肪止用之保護元件，使用第1實 施形態所說明之製造方法製成之T F Τ。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） ： — -15 - (請先閲讀背面之注意事項再填寫本頁) 蒗- 訂 A7 經濟部中央標隼局員工消費合作社印製 438991 _B7__ 五、發明説明（13 ) 畫素部4 0 0 0 (圖中以虛線所圍部分）係多數畫奉 120所構成，各畫素含有TFT (轉接元件）300〇 ’ TF T 3 0 0 0設在掃描線5 2與信號線5 4之交點》 在掃描線5 2與信號線5 4之各端部分別設有墊片（ 電極）160A，160B，此等墊片與LC — COM線 180之間連接有第1保護元件140A，140B，上 述墊片與保護環1 〇 〇之間則形成有第2保護元件 150A，150B。再者，LC-COM線 180 經由 銀點墊片1 1 0，同時連接在相對之電極。 「墊片1 6 0A，1 6 0B」係連接搭接線或碰撞（ b u m p )電極，或使用聚醯胺帶製成之電極等（外部端 子）之電極8 而「L C-COM線1 8 0」係供給作爲驅動液晶之 基準之電位之線。共同電位L C 一 COM係，例如第3 〇 圖所示，設定在較顯示信號電壓Vx之中點電位vB低Δν 之電位。即，如例示於第2 9圓，畫素部之丁 FT 3 0 0 〇存在有閘極，源極間電容Ccs，其影響使.顯示信 號電壓Vx與最終之保持電壓Vs之間產生電位差AV。爲 了要補償此電位差Δν，以較顯示信號電壓Vx2中點電 位之電位當作共同之基準電位。 再者，第2 9圖中，X係信號線，Y係掃描線， C ^係液晶之等效電容，C ad係保持電容。而第30圖中 ，V x係供給信號線X之顯示信號電壓，V γ係供給掃插線 Υ之掃描信號電壓。 先浪尺度適用中國國家標孪（CNS ) Α4規格（210X297公釐) ~ " -1〇 - (請先聞讀背面之注意事項再填寫本頁)Ding (please read the precautions on the back before filling this page) "Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 43899 1 Λ7 --------- V. Description of the invention (8) Polar layer i 4j ^ Form a protective element for preventing electrostatic damage described later ....... · One I—III · M—Double. The anode material layer 4 c is used to form a connection or inspection with the outside. The area of the terminal used (please read the precautions on the back side and fill in this page), and then use the plasma CVD method to continuously form a gate insulating film 6 made of silicon nitride film SiNx, etc., without doping impurities. The qualitative true indeterminate sand film 8 "and the n-type silicon film (resistive contact layer) 10, and then the photo-etching technique is used to make the true amorphous silicon film 8 and the n-type silicon film (resistive contact layer) 10 small islands. At this time, the thickness of the "electrode insulating film 6 is, for example, around 3 00 0A", the thickness of the true silicon film 8 is, for example, around 3 0 0OA, and the thickness of the resistive contact layer 10 is, for example, around 50 0 A. The characteristic of this process is that no contact hole is formed to the gate insulating film. (Process 2) Secondly, as shown in Figure 2, τκ, by diffusion Spattering) or photoetching to form, for example, source and suction electrodes around 1 3 0 0A composed of C r, and 1 2 a, 1 2 b. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (Process 3) As shown in the figure, the source and sink electrodes 12a and 12b are used as a mask, and the central portion of the resistive contact layer 10 is removed by etching to separate the source and sink electrodes (separation touch). At this time, they can be connected in the same room. Perform patterned etching of source and sink electrodes and separate etching. That is, the source and sink electrodes are first etched with C-based etching gas. The paper size is applicable to China National Standard (CNS) A4 specification (2ί〇Χ297). (Mm) -11-Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 43 89 9 1 at B7 V. Description of the invention (9) Etching of 1 2 a, 1 2 b, and then switch the etching gas to s Fβ. The central part of the resistive contact layer 10 is etched with gas. (Process 4) Next, as shown in FIG. 4, a protective film i 1 4 is formed by, for example, a plasma CVD method. The protective film 1 4 is, for example, 2 0 0 0A. Front and rear silicon nitride films (Si NX) (Process 5). Second, as shown in Figure 5 It is formed in a part of the protective film 14, and the opening 20 for connecting external terminals (overlap wiring or external leads of the IC, etc.) is formed at the same time, and contact holes 16, 18 are formed at the same time. The opening 20 and the contact hole 18 pass through the gate. The insulating film 6 and the protective film 14 are overlapped. The contact hole 16 is formed by penetrating only the protective film 14. When the opening 20 and the contact hole 16 are formed, the gate material layer 4 b, 4 c The effect of the etch stop layer occurs separately. When the contact hole 16 is formed, the source electrode and the sink electrode 12 b become an etching stopper. (Process 6) Then, as shown in FIG. 6, an I ITO (Indium Tin Oxide) film is deposited at a thickness of about 500 A before and after selective etching * to form a wiring 22a and an electrode 22b composed of ITO. The etching of ITO is performed by wet etching using a mixed solution of H C 5 / HN 03 / H20. This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the notes on the back before writing this page privately)-Order 12 A7 B7 438991 V. Description of the invention (ίο) As mentioned above, open The portion 20 and the contact hole 18 are formed by overlapping the gate insulating film 6 and the protective film 14. Therefore, it becomes a very deep contact hole with two layers of green film "(Please read the precautions on the back before filling this page). However, because of the high melting point of I TO, its coverage is better than aluminum metal. Even deep contact holes will not cause poor contact. Furthermore, in addition to I TO, other transparent electrode materials having a high contact such as gold oxide can also be used. Metal oxides such as SnOx and 2nOx can also be used. At this time, the coverage of the level can still meet the actual use. The TFT having the bottom gate structure thus manufactured is used, for example, as a switching element of a pixel portion of an active matrix substrate. At the same time, the electrode 2 2 b formed by IT◦ becomes a pad for connecting external terminals (external leads of the IC, etc.) 〇 (characteristics of this manufacturing method) Printed on Figure 7 by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs ~ Figure 7F shows the manufacturing process of TF T of this embodiment described in Figures 1 ~ 6. On the other hand, Figures 8A through 8G show the manufacturing process of the TFT of the comparative example. This comparative example is conceived by the present inventors, etc., in order to clearly show the characteristics of the manufacturing method of T F T in this embodiment, rather than a conventional example. Fig. 8A of the comparative example is the same as Fig. 7A. In FIGS. 8A to 8G, the same parts as those in FIGS. 7A to 7F are denoted by the same symbols. The comparative example is shown in FIG. 8B. Before forming the pole-absorbing layer, the contact holes K1 and K2 are formed. This paper size is in accordance with Chinese National Standard (CNS) A4 specification (21 × 297 mm) 4389 9 1 A7 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs B7 V. Description of the invention (11) 1 | Shown j. Forming the source and sink layers 1 2 a 1 1 1 | 1 2 b ♦ and source sink layers of the same material 1 2 C 9 1 1 2 d α Μ 1 S shown in D forms IT 0 film 3 0 Read 1 I and then read i I 8 (shown in Figure E)) Etch (divided away etching) in the middle of the resistive contact layer 1 0 into the back 1 line (note the separation etching) 0 Note 1 | Secondly, as shown in FIG. 8 F, a protective film is formed. 4 0 0 Matters are true. Finally, 9 is shown in FIG. 8 G to form an opening □ part K 3 0 to make the $ 窝 I source < k attractor. The surface of the material layer 1 2 d is exposed > The electrode (P ad) connected to the external 1 1 terminal 0 1 1 According to the manufacturing method of the above comparative example, the formation of the 1 1 contact hole in Figure 8 is added with the opening part of Figure 8 The process of ordering K 3 requires a total of two openings. 0 1 1 For this embodiment, the manufacturing method is as shown in Fig. 7 et 1 and Figure II shows that the openings are formed once. 1 6 1 8 2 0 〇 That is, 1 The protective film 1 is also formed on the source 1 pole-absorptive layer 1 2 b at the same time as the protective film 1 1 and the gate green film 6 overlap with the film-forming opening □. The Γ «ΐ pattern therefore forms the formation process of the P 1 1 part only-once. The exposure process can also be reduced by one. The deposition process and photolithography process of the photoresist etching film can be avoided by 1 i. Therefore, A total of 1 reduction of three M processes 0 can also simplify the manufacturing process0 I Simultaneous t The manufacturing method of this embodiment can be performed consecutively in the same _ ~ * room. The 7th i ql source absorber layer shown in Figure B 1 rwt patterning of 1 2 a 1 2 b (1 1 dry etching ) * And the etching of 7S < resistance contact layer 10 in the center of circle 7 (dry etching) in the middle of the same ○ that is, the etching is sequentially switched in the same room 1 1 This paper size applies to China National Standard (CNS) A4 specifications (21〇297297) -14 — Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 4 3 8 9 9 1 B7 V. Description of the invention (12) Gas can be continuously etched. In this regard, the I τ ◦ layer 30 of the comparative example is the same layer as the source and sink electrodes 10 a 10b. That is, the two are laminated and there is no protective film therebetween. Therefore, in the presence of foreign matter in other areas (not shown) on the substrate, "it is possible that the wiring formed by the IT 0 film that should have been insulated", the source, the electrode layer, and the wiring or electrode formed of the same material may be short-circuited. . That is, the reliability of the element formed by the manufacturing method of this embodiment is high. At the same time, the comparative example may be affected by the subsequent process because the I TO film is formed at an earlier stage_3 0 (Figure 8D). Contamination of 1 TO composition of I TO or Sn. In the manufacturing method of this embodiment, the ΪΤ films 22a and 2 2 b are formed in the final process, so it may be contaminated by 5 η of the composition of I TO. Very little sex. Thus, according to the manufacturing method of this embodiment, the manufacturing process can be reduced, and a highly reliable component can be manufactured. (Second embodiment) Next, a second embodiment of the present invention will be described with reference to Figs. 9 to 18 again. Fig. 9 is a plan view showing the layout of an active matrix substrate according to a second embodiment of the present invention. The active matrix substrate of FIG. 9 is used in a liquid crystal display device. The switching element in the pixel section and the protective element for static electricity destruction are manufactured using TF made by the manufacturing method described in the first embodiment. This paper size applies to China National Standard (CNS) A4 specifications (210 × 297 mm): — -15 — (Please read the notes on the back before filling out this page) 蒗-Order A7 Printed by the Employees" Cooperative of the Central Bureau of Standards, Ministry of Economic Affairs 438991 _B7__ V. Description of the invention (13) The pixel unit 4 0 0 0 (the part enclosed by the dotted line in the figure) is composed of a majority of 120 pixels, and each pixel contains a TFT (switching element) 300 00 "TF T 3 0 0 0 is set at the intersection of the scanning line 5 2 and the signal line 5 4 "At each end of the scanning line 5 2 and the signal line 5 4 are provided gaskets (electrodes) 160A, 160B. These gaskets and LC — COM First protective elements 140A and 140B are connected between the wires 180, and second protective elements 150A and 150B are formed between the gasket and the protective ring 1000. In addition, the LC-COM line 180 is connected to the opposite electrode at the same time through the silver dot gasket 1 110. "Shim 1 6 0A, 1 6 0B" refers to the electrode 8 which is connected to a patch wire or bump electrode, or an electrode (external terminal) made of polyurethane tape, etc. and "L C-COM cable 1 8 "0" is a line supplying a potential which is a reference for driving the liquid crystal. The common potential L C-COM is set to a potential Δν lower than the midpoint potential vB of the display signal voltage Vx, as shown in FIG. 3. That is, as illustrated in the 29th circle, there is a gate and source capacitance Ccs in the pixel section FT 3 0 0 〇, which influences the potential difference AV between the display signal voltage Vx and the final holding voltage Vs. . In order to compensate for this potential difference Δν, the potential which is higher than the midpoint potential of the display signal voltage Vx2 is taken as the common reference potential. Furthermore, in Figs. 29 and 9, the X-series signal lines, the Y-series scanning lines, C ^ is the equivalent capacitance of the liquid crystal, and C ad is the holding capacitance. In Fig. 30, V x is the display signal voltage supplied to the signal line X, and V γ is the scan signal voltage supplied to the scan line Υ. Xianlang scale is applicable to China National Standard (CNS) Α4 specification (210X297 mm) ~ "-10-(Please read the precautions on the back before filling this page)

4389 9 1 A7 B7 五、發明説明（14 ) 而「保護環1 0 0」係作爲液晶顯示裝置在製造階段 之靜電對策，而設在墊片1 6 0A ’ 1 6 0B外例之線。 (請先閱讀背面之注$項再填寫本頁) L C — COM線1 8 0及保護環1 0 0均爲共同電位 線，因此，若在墊片與此等線之間連接孔保護用二極體， 則可使靜電逸出到此等線上， 同時，保護環1 0.0係如第2 7圖所示，將在貼合 TFT基板1 3 0 0與相對基板（彩色濾波基板）後，連 接驅動用I C之前，沿著劃線（SB)切斷掉，但LC — C OM線1 8 0會殘留在最終製品。因此，在基板切斷後 ，連接I C之前，畫素部之TFT仍可由第1保護元件 1 4 0加以保護免受靜電破壞，因此對提高製品之可靠度 a 而因最終製品仍留有保護二極體，實際使用製品時之 耐靜電破壤強度也會提高。而且是使用T F T之保護用二 極體，因此門檻值（V ±h )很容易控制，也可降低漏洩電 流，因而在最終製品殘留二極體也不會有不良影響。 第1 1圖A〜第1 1圖C表示保護元件之具體例子。 經濟部中央標準局員工消費合作社印製 亦即，如第1 1圖A所示，保護元件係由，連接第1 TFT (F1)之閘極，吸極而成之MOS二極體，與連 接第2TFT (F2)之源極、吸極而成之MOS二極體 ，將兩MO S二極體反向並聯而構成。其等效電路係如第 1 1 B圖所示。 因之，如第1 1圖C所示I此保護元件之電流、電壓 特性在雙方向具有非線性特性》各二極體在施加低電壓時 本纸張尺度適用中國國家標準（CNS ) A4規格（2丨0X297公釐） -17 - 經濟部中央標準局員工消費合作社印製 4 3 8 9 9 1 A7 B7 五、發明説明（15 ). 成爲高阻抗狀態，施加高電壓時成爲低阻抗狀態。同時，. 各二極體實質上是電晶體’流通電流之能力很大’可高速 吸收靜電，因此靜電保護能力很高。 在第1 0圖表示第9圖之墊片1 6 0A，1 6 0B周 邊之靜電保護元件之具體配置例子。 第1保護元件1 4 Ο A係由連接源極、吸極間之薄膜 電晶體M6 0及M6 2所構成’同樣地，第1保護元件 1 4 Ο B係由薄膜電晶體M4 0及M4 2所構成。 第2保護元件1 5 0A ’ 1 5 0B也同樣’由薄膜電 晶體M8 0，M8 2及M20，M2 2所構成。 此等保護元件在施加正或負之過大之突波時導通，使 該突波高速逸至LC 一 COM線180或保護環100。 而配置在墊片外側之第2保護元件1 5 0則除了靜電 保護之功能以外，同時具有，可以防止由保護環1 0 0短 路各墊片1 6 0致在排成行列過程中無法做最終檢查。茲 參照第14圖說明如下。. 如第14圖所示，將行列測試器2 0 0 (有放大器 220)之探針連接在墊片160A1 ，對畫素部之 TFT (Ma)進行試驗時， 第2保護元件1 5 0A1及第2保護元件1 5 0A2 維持著高阻抗狀態，因此畫素部之TFT (Ma )與 TFT (Mb)在電氣上成分離狀態。因之可防止與其他 電晶體間之串訊，而得僅對所需之T F T ( M a )進行試 驗。 本紙張尺度適用中國國家標準（CNS ) Λ4规格（210X297公釐〉 (請先閲讀背面之注意事項再填寫本頁)4389 9 1 A7 B7 V. Description of the invention (14) The "protective ring 1 0 0" is used as a countermeasure against static electricity in the manufacturing stage of the liquid crystal display device, and it is provided on the line of the gasket 16 0A ′ 1 6 0B. (Please read the note on the back before filling in this page.) LC — COM wire 1 8 0 and guard ring 1 0 0 are common potential wires. Therefore, if the hole is used to protect the hole between the gasket and this line, The polar body can allow static electricity to escape to these lines. At the same time, the protective ring 1 0.0 is connected to the TFT substrate 1 3 0 0 and the opposite substrate (color filter substrate), as shown in Figure 27, and then connected. Before driving the IC, it is cut off along the scribe line (SB), but the LC-C OM line 1 80 remains in the final product. Therefore, after the substrate is cut off and before the IC is connected, the TFT of the pixel unit can still be protected from electrostatic damage by the first protection element 140, so to improve the reliability of the product a, but the final product still has a protective diode. In addition, the resistance to electrostatic breakage when the product is actually used will also be improved. In addition, the protective diode of T F T is used, so the threshold value (V ± h) is easy to control and the leakage current can be reduced, so the residual diode in the final product will not have adverse effects. 11A to 11C show specific examples of the protection element. Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs, that is, as shown in Figure 11A, the protection element is a MOS diode formed by connecting the gate and suction of the first TFT (F1), and connecting The MOS diode formed by the source and the sink of the second TFT (F2) is composed of two MO S diodes connected in anti-parallel. The equivalent circuit is shown in Figure 11B. Therefore, as shown in Fig. 11C, the current and voltage characteristics of this protection element have non-linear characteristics in both directions. "When the diode is applied with a low voltage, this paper applies the Chinese National Standard (CNS) A4 specification. (2 丨 0X297mm) -17-Printed by the Consumers" Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 4 3 8 9 9 1 A7 B7 V. Description of the invention (15). It becomes a high-impedance state and a low-impedance state when a high voltage is applied. At the same time, each diode is essentially a transistor, which has a high ability to pass current, and can absorb static electricity at high speed, so the electrostatic protection ability is very high. Fig. 10 shows a specific configuration example of the electrostatic protection elements around the gaskets 16A and 16B of Fig. 9. The first protective element 1 4 〇 A is composed of thin-film transistors M6 0 and M6 2 connected between the source and the sink. Similarly, the first protective element 1 4 〇 B is composed of thin-film transistors M4 0 and M4 2 Made up. The second protection element 15 0A "1 50 0B is also formed of thin film transistors M8 0, M8 2 and M20, M2 2. These protection elements are turned on when a positive or negative excessive surge is applied, so that the surge escapes to the LC-COM line 180 or the guard ring 100 at a high speed. The second protection element 150, which is arranged on the outside of the gasket, has the function of electrostatic protection, and can also prevent the gaskets 1 0 0 from short-circuiting each of the gaskets 1 60, which can not be finalized in the process of lining up. an examination. It is explained below with reference to FIG. 14. As shown in Fig. 14, when the probe of the row tester 200 (with amplifier 220) is connected to the gasket 160A1, and the TFT (Ma) of the pixel portion is tested, the second protection element 150A1 and Since the second protection element 150A2 maintains a high impedance state, the TFT (Ma) and the TFT (Mb) of the pixel portion are electrically separated. As a result, crosstalk with other transistors can be prevented, so only the required T F T (M a) can be tested. This paper size applies Chinese National Standard (CNS) Λ4 specification (210X297 mm) (Please read the precautions on the back before filling this page)

18 - A7 B7 438991 五、發明説明（) 又如第2 7圖所示，TFT基板1 3 0 0之製作完蹒 後，在塗敷配向膜’研磨過程’封閉材（間隔片）塗敷過 程，基板之粘貼過程，分斷過程，液晶注入及加封過程之 各過程結束後，在連接驅動用I C之前’沿著劃線（S B )切斷，而去除保護環 惟固連接在L C — COM線1 8 0與墊片1 6 0間之 第1保護元件1 4 0會留存下來，在連接驅動用Ϊ c前。 仍可有靜電保護作用。 再者，第1保護元件會殘留在最終製品，但使用 T F T之保護元件有正確之門檻值控制，因此不會因漏洩 電流等之影響使製品之可靠度降低^ 其次再參照第12圖及第13圖，說明第11圖所示 之第1及第2電晶體（FI ，F2)之元件之構造。 本實施形態係如第1 2圖所示，將由畫素材料形成之 ITO膜300，320，330當作連接源極、吸極之 配線使用》 第1 3圖表示對應第1 2圖之平面配置圖之各部分（ A)〜（F)之截面構造。 如圖示，構成靜電保護元件之第1薄膜電晶體F 1及 第2薄膜電晶體F 2均具有反交錯構造（底閘構造）。 亦即，在玻璃基板4 0 0上形成閘極層4 1 0， 420，430，440 •在其上面形成閘極絕緣膜 450，而形成真性無定形矽層470，472，介由η 型之電阻層480，形成吸極（源極）層490，並形成 本紙張尺度適用中國國家標率（CNS ) /\4见格（210Χ297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂. 經濟部中央標準局員工消費合作社印製 -19 - 438991 A7 B7 五、發明説明（Π ) 覆蓋這些各層之保護膜4 6 0，而以畫素電極材料之 ITO 所成之膜（ITO 膜）300，320，330 連 接閘極，吸極間。 (請先閲讀背面之注意事項再填寫本頁) I 丁 ◦膜300 ，320 ，330係經由，貫穿閘極 層上之閘極絕緣膜450及保護膜460之兩層膜之接觸 孔，以及貫穿吸極層4 9 0上之保護膜4 6 0之接觸孔， 連接閘極層與吸極層。 這時，I TO因爲是高融點，級層涵蓋性較鋁等優異 *因此經由貫穿兩層膜之深接觸孔，仍可確保良好之接續 〇 而如在第1實施形態所說明，對閘極、源極之接觸孔 ，因爲是在連接外部端子之開口部之形成過程中間時形成 ，因此可縮減過程數。 以上係就使用I TO膜當作配線以形成保護用二極體 之例子進行說明。但I T 0膜當作配線利用並不限定如上 述，例如也可以有第1 5圖所示形態之利用法。 經濟部中央標準局員工消費合作社印製 即，在第15圖，IT ◦膜3 4 2係利用作爲形成墊 片1 6 0附近之交疊配線3 4 2。 所請「交疊配線」係指，將液晶顯示裝置之內部配線 引出到封閉材5 2 0外側時，爲了藉厚層間絕緣膜保護配 線，將上層之配線連接到下層之配線，迂迴到出外部用之 配線。 亦即，ITO膜342係連接吸極層490，與使用 與閘極相同材料形成之層（閘極材料層）4 1 2。藉此， 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -20 - 438991 A7 B7 五、發明説明（IS ) 引出閘極材料層4 1 2外部之部分係由閘極絕緣膜4 5 0 與保護膜4 6 0之雙方加以保護，可靠度可以提高。 再者，在第1 5圖"記號5 0 0及5 0 2表示配向膜 ，520表示封閉材，540係相對電極，562係玻璃 基板，1 4 0 0係液晶。而在墊片1 6 0連接有，例如搭 接線6 0 0。有時是連接碰撞電極或使用聚醯胺薄膜之電 極層取代搭接線= I T 0膜亦可在其他各處當作配線使用。若例示可將 I T 0膜利用作配線之處所，則如第1 6圖所示* 在第16圖中，I TO膜用粗實線表示。 A 1〜A 3之I TO膜被用作形成保護元件之配線’ A4被用作連接掃描線5 2與墊片1 6 0 B之配線，A5 係被用作第1 5圖所示之交疊配線。 而Α6係被用作水平方向之L C 一 COM線與垂直方 向之L C — C 0M線之連接用配線.》亦即*水平方向之 L C — COM線係由閘極材料形成，垂直方向之L C — 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) C OM線係以源極材料形成，因此必須以I TO連接雙方 〇 再者，在第1 6圖中之A6 *銀點墊片1 1 0可以與 水平方向之L C - C OM線或垂直方向之L C 一 C OM線 中之任一線在同一過程中形成，而如此形成時，可介由 I TO連接未與銀點墊片1 1 0 —體形成之LC 一 COM 線（水平、垂直之任一方）與銀點墊片1 1 0即可。 其次參照第1 7圖，第1 8圖，說明在畫素部之各β 木紙張尺度適用中國國家榡準（CNS > Α4規格（210X 297公釐） 一 21 一 4 3 8 9 9 1 a? B7 五、發明説明（l9 ). 素之架構。 第1 7圖表示畫素部之平面配置° (請先閱讀背面之注意事項再填寫本頁) 配置連接在掃描線5 2及信號線5 4 ’具有轉接元件 之功能之TFT (由閘極7 2 0 ’吸極7 40 ’未沉積雜 質之真性無定形矽層475所構成），吸極740連接在 畫素電極（ITO) 340 »圖中’ K2係接觸孔’ C a d係保持電容。保持電容C a d係由相鄰接之閘極配 線與延長之畫素電極重疊而形成。 第1 8圖係沿第1 7圖B — B線之截面構造圖。與第 1 5圖所說明之構造相同》 (第3實施形態） 先參照第1 9圖〜第2 6圖，說明上述第2實施形態 之T F T基板之製造方法。 在各圖，左側爲形成畫素部之轉接電晶體之領域，中 . 央部爲形成保護元件之領域，右側爲連接外部端子之領域 (墊片部）。 經濟部中夬標準局員工消費合作社印聚 (1 )如第1 9圖所示，首先利用光平版印刷技術， 在玻璃基板（無鹼基板）4 0 0上，形成例如厚度 1800A前後之Cr構成之電極720，722 ， 900，902，904。 C r之沉積係使用磁控管濺射裝置，在5 0m To f r之減壓下進行。而C r之加工則以使用〇：又2系 本纸張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐} -22 - 經濟部中央標準扃員工消費合作社印装 4 3 89 9 1 at B7 五、發明説明（2〇 ) 氣體之乾式蝕刻爲之。 記號7 2 0，9 0 0係成爲TFT之閘極之層（閘極 層），記號7 2 2係相當於第1 7圖所示之掃描線5 2之 層記號9 0 2 ，9 0 4係由閘極層之相同材料形成之層 (閘極材料層）。 (2 )其次，如第2 0圖所示’藉電獎CVD法.，連 績形成由矽氮化膜S i Nx等構成之閘極絕緣膜9 1 〇 ’ 未沉積雜質之真性無定形矽膜以及η型矽膜（電阻層）’ 接著，藉使用S Fe系之蝕刻氣體之乾式蝕刻形成真性無 定形矽膜及η型矽膜（電阻層）之圖型。 藉此形成小島化之真性無定形矽層4 7 5 ’ 9 2 0以 及η型矽膜（電阻膜）477，922。 閘極絕綠膜9 1 0之厚度爲，例如4 Ο Ο 0Α前後’ 真性矽層475 ，920之厚度爲，例如3000Α前後 ，而電阻層477，92 2之厚度爲，例如500Α前後 〇 本過程之特徵在於，不形成對閘極絕緣膜之接觸孔。 因此，不需要光阻蝕刻膜之塗敷過程*曝光過程，及蝕刻 去除過程，可減少過程數。 (3 )然後，如第2 1圖所示，藉濺射法及照相照蝕 刻法，形成例如由C r構成之1 5 0 0Α前後之源極、吸 極層 740a，740b，930a ，930b。 本紙張尺度適用中國囤家標準（CNS ) A4規格（210X 297公釐） ：--：---TJ^:-- (請先閲讀背面之注意事項再填寫本頁) 訂 -23 - 4389 9 1 Λ7 ______B7__ 五、發明説明（21 ) (4) 接著，將源極、吸極層740a，740b， 930a ’ 930b當作掩蔽，藉蝕刻去除電阻層477 ，9 2 2之中央部分，使源極與吸極分離開。 第2 1圖所示之源極、吸極層之圖型化，與第2 2圖 "所示之源極、吸極之分離蝕刻，係在同一蝕刻裝置之蝕刻 室內連續進行。亦即，先以C又2系之蝕刻氣體加工源極 、吸極層 740a，740b，930a，930b，接 著將蝕刻氣體切換成爲S Fs系之氣體，進行電阻層 47 7 ’ 922之中央部分之蝕刻。如此，由於是連續使 用乾式蝕刻，可簡化製造作業。 (5) 然後如第2 3圖所示，使用電漿CVD法形成 保護膜9 4 0。此保護膜9 4 0係例如2 0 0 0A前後之 矽氮化膜S i N X。 經濟部中央標準局員工消费合作社印製 (請先閱讀背面之注意事項再填寫本頁) (6) 接著，如第24圖所示，使用呂？6系之蝕刻 氣體對保護膜9 4 0進行選擇式之蝕刻。亦即，在形成墊 片部之開口部1 6 0之同時，形成接觸孔C P 1及接觸孔 K 8，K 1 0。 開口部1 6 0及接觸孔c P 1係貫穿閘絕緣膜9 1 0 及保護膜9 4 0之重疊膜所形成之開口部，接觸孔K8， K1 〇係僅貫穿保護膜940之開口部。 這時，閘極材料層9 0 2 ’ 9 0 _ 4在形成接觸孔 本紙浪尺度適用中國國家標準{ CNS ) A4規格（210 X 297公釐） -24 - 43899 f at B7 五、發明説明（22 ) CPI ，開口部160時，成爲蝕刻阻止層，源極、吸極 740a ，930b則在形成接觸孔K8，Κ1〇時，成 爲蝕刻阻止層。 (請先聞讀背面之注意事項再填寫本頁} (7 )接著，如第2 5圖所示，使用磁控管濺射裝置 ，以厚度 5 0 0 Α 前後沉積 I Τ 0 ( Indium Tin Oxide )膜，使用HC β/ΗΝ03/Η20之混合液進行蝕刻， 加工成一定之圖型。藉此完成有有源矩陣基板。在第2 5 圖，記號9 5 0係由I TO形成之畫素電極，記號9 5 2 係構成保護用二極體之一部分之由I TO形成之配線.，記 號9 5 4係連接外部端子用之I TO形成之電極（墊片） 〇 因爲使用級層涵蓋性良好之I TO作爲配線。因此可 確保良好之電氣接續》畫素電極材料可使用例如金屬氧化 物之融點高之其他透明電極材料。例如使用S n.0 X， ΖηΟχ等金屬氧化物^ 又可從第25圖清楚看出，在I TO層9 50， 經濟部中夬標準局員工消費合作社印製 952 ’ 與源極、吸極 740a，740b，930a， 9 3 0 b之間一定夾有保護膜9 4 0 »這表示，在基板上 之配線領域（未圖示），由I TO形成之配線層，與源極 、吸極層確實成電氣上分離之狀態。因此不會因異物引起 雙方短路。 同時’本製造方法係在最後過程（第2 5圖）始形成 ϊ TO膜，因此不必擔心受I το組成物之Sn ’ I η之 表紙張尺度適_^中國國家標準（〇奶）八4規格（210"/297公釐)~ ~ 43899 t A7 __B7 五、發明説明（23 ) 污染。 如此 > 依本實施形態之製造方法時，可縮減有源矩陣 基板之製造過程，而且可以搭載對靜電有充分之對策，可 靠度很高之薄膜電路。 再者，第25圖係將ITO膜9 52，954直接連 接在閘極層9 0 2以及閘極材料層9 0 4，但也可以介由 Mo，Ta，T i等緩衝層連接雙方。 其次再說明，使用完成之有源矩陣基板裝配液晶顯示 t 裝置之過程》 如第2 8圖所示，粘貼相對基板1 5 0 0與TFT基 板1 3 0 0，經過如第2 7圖所示之分斷過程後，封裝液 晶，接著連接驅動用I C，再如第28圖所示，經過使用 偏光板1200，1600以及使用後燈1000等之裝 配過程，而完成有源矩陣基板液晶顯示裝置。 第2 6圖表示有源矩陣液晶顯示裝置之主要部分之截 面。第2 6圖之與第1 5圖，第1 6圖相同部位標有同一 記號》 經濟部中央標準局員工消費合作社印製 H. —- - - I I I n I - --- n _] _ _ HE __ HI (請先閲讀背面之注意事項再填寫本頁) 在第2 6圖，左側爲有源矩陣部，中央爲形成保護元 件（靜電保護用二極體）之領域，右側爲墊片部。 在墊片.部，由ITO形成之電極（墊片）95 4上， 介由異方性導電膜5 0 0 0 ，連接液晶之驅動用I C 5 5 0 0之外部引線5 2 0 0 =記號5 1 0 0係導電性粒 子，記號5 3 0 0係薄膜帶•記號5 4 0 0係密封用之樹 脂。 本紙張尺度適用中國國家標隼（CNS ) A4規格（210X297公釐} 0„ -ώΟ - 4. 3 R Q 〇 f 、.、^ A 7 B7_ 五、發明説明（24) 第2 6圓之驅動用I C之連接方法採使用帶狀載子之 方式（TAB方式），但也可以採用其他，如COG ( Chip 〇n Glass)方式。 本發明不限定如上述實施形態，利用正交錯構造之 T F T時，亦可變形應用之。同時對畫素電極之材料，除 了 I TO以外，亦可使用如金屬氧化物等融點高之其他透 明電極材料》例如可以使用SnOx，ZnOx等金屬氧 化物。這時之級層涵蓋性，亦可符合實用性。 若將本實施例之液晶顯示裝置使用在個人電腦等機器 之顯示裝置，製品之價值可以提高。. .: 圖式之簡單說明 第1圖〜第6圖係表示本發明薄膜元件之製造方法之 每一過程之元件之截面圖， 第7圖A〜第7圖F係說明第1圖〜第6圖所示製造 程序技術