tft display for stm32f4 quotation

Ahh yeah look at that! If you look closely, top right of the LCD, that’s obviously a flex connector for a resistive touch overlay (4 contacts running to the 4 sides of the LCD overlay).

Agreed! I will be picking one up. I’ve been happy developing for the stm32f4discovery (and other stm32 chips) with gcc, openocd and gdb. It is all free.

The STM32F4 cores are pretty well supported by libopencm3 and Code Sourcery and summon-arm-toolchain both build working toolchains and openOCD supports the stlink natively now.

If you are looking for a ready-to-use solution, checkout ChibiStudio (from the ChibiOS/RT project), which off curse can also be used without ChibiOS. The windows version is available on ChibiOS website, while a linux version i did packaged some time ago can be found here:

A fair number of inexpensive baseboards/motherboards/accessories have also appeared for earlier versions. I hope Olimex puts out a couple nice STM32F429/427 boards.

I can see there is only a STLINK usb connector on board, so there is even no FS to expect. beside HS, I suppose does mean High Speed (480mbps). but HS anyway needs a separate physical layer USB chip for addition to STM32F4 chip and most likely this is chip is not present on this board anyway, because this is STM32F4+LCD+SDRAM demoboard and there is no need for USB at all.

The data brief bullet-points “USB OTG with micro-AB connector”. Looks like the micro-usb is on the underside, sticking out at the bottom of the photo. With matching T/H mounting tabs on the topside, labelled USB USER. But like you said, the STM32F4 requires an external PHY for HS, and it seems unlikely they’d include one on this board.

I think Farnell’s 21€ will be accurate, as ST’s suggested USD price is $24. The placeholders for the STM32F429I-DISCO on element14 (a division of Farnell) and mouser show $42, which I think predates the later ST announcement. I think the ST announced $24 will hold, and the distributor prices will match that, as they have in the past.

Thanks Jon, Yeah I would want something that was ready made, install and go and as simple and straightforward as possible. I really hate it when you go to get something installed and there’s all sorts of things to learn before you even know which files to download and then find “Oh, it needs XYZ and then you get XYZ and it needs UVW as well and … and so and in the end you give up and go with something else or forget the idea. I like the idea of the Mikro Electronica compilers, as although they aren’t free and aren’t cheap (well they are cheap compared to some!), it looks good and relatively straightforward, offers a choice of languages and some regulars here have indicated it’s pretty good.

You’re just a touch off there, I’m well and truly past Arduino, but yes it’s good for beginners who want to go that way, even if (from what I hear) some of the libraries are so slow and bloated. I just want to get the job done with whatever micro I’m using, not muck around trying to make one thing play nice with another and learn all the innards of the compiler, etc. Unfortuantely many of the offerings don’t come in a simple ‘get the job done with no fuss’ type of package. So for those that want to play around with the toolchain and tinker and don’t mind spending time learning all that instead of getting on with their Micro project, then that’s fine for them, but I want to get the job done, have it run fast enough for the application, be stable, put it out there and ensure it works properly when it’s out there.

I look at this and I think of the new HP Prime, with an ARM9 CPU, currently about $180 US, and I wonder if you’re really getting value for the extra $156. Heck, even a Beaglebone Black is only about $45.

I wouldn’t expect TI to hack profits from their calculator range, and HP have always been expensive, but ST could easily change their format to calculator-friendly. Clamshell design, LCD & battery in top half, CPU & keypad in bottom half, expansion pins to left / right of keypad makes a self contained unit.

You can get the touchpads custom made, but the only places that I know of aren’t at all cheap, though there will no doubt be somebody doing it cheap. I think in most cases people design the keypad on-screen and use the touch panel, though obviously that isn’t ideal for all situations.

It’s certainly useable in any other project where you have an onboard LCD controller. Especially any other project that happens to use a STM32F4. What difference would it have made if it had an external controller? Surely it’d have been on the same PCB. Were you hoping for a removeable SPI-interfaced module?

Look in the UM1670 user manual, paragraph 4.8: the tft includes an ILI9341 controller. The ILI9341 has it’s own graphics ram inside, it is not mapped into the STM32 address space. It is connected to the STM32 via a parallel bus. The ILI9341 and similar controllers are common on cheap chinese tfts. So it is no problem to source similar tfts for your final product after developing on the discovery board.

UM1670 in paragraph 4.8 also says that “The TFT LCD is a 2.41″ display of 262 K colors. Its definition is QVGA (240 x 320 dots) and is directly driven by the STM32F429ZIT6 using the RGB protocol”. ILI9341 has multiple modes of operation including direct RGB/HSYNC/VSYNC mode which bypasses internal GRAM. I don’t have the board yet but I assume display buffer is located in external SDRAM which is also on the board. The whole point of this kit is to show TFT and SDRAM interface in new STM32F4x9.

I’ve checked this discovery board firmware available from ST’s site (“STM32F429 discovery firmware package UM1662” number: STSW-STM32138, btw. finding it is a bit difficult – ST’s site is terrible):

They are using FreeRTOS, FatFs, STemWinLibrary which is ST’s version of Segger’s emWin graphic library and STM32F4xx_StdPeriph_Driver v1.2.1 which includes F429/439 support (FMC, LTDC and DMA2D added).

The license (enforceable or not) basically say it is strictly for evaluation only, which kinda makes sense since at that low price it probably cost them money to sell it

I suppose since it’s got an ST-Link on board, they could enforce that you aren’t allowed to use the ST-Link firmware for anything other than eval, thus by distributing the PCB in a finished product you’d be violating the license. But I think that’s actually also unenforceable too, though. I’m not an IP lawyer, but I think case law is that if you hand someone your iPod, they own all the music on it now too, seems like that applies here.

I suspect that clause is also so they won’t get people raging at them because they integrated the dev board into some commercial product and ST then later discontinues it. That has unfortunately happened a few times in the past.

That’s just dumb. I’m pretty sure you only get design lifecycle guarantees when you sign an order for a few hundred k + parts. Much less when you’re abusing a dev board into an end product.

Check again martin. Those lines have pullups to vdd and are connected to cpu pins. I have this board for some time and I can confirm that lcd is driven by lcd controller from cpu and frame buffer is in external dram which is also on the board.

Well even so that DMA2D stuff is geared towards displays with one address pointer. Try using it with displays with the x& y positions on separate addresses (like x add is 2A and y is 2B with base address of 0x6C000000 for commands and a offset of 4 for data ).. Wish there was and easy way of getting the DMA2D to work with different larger displays like the 640 by 480 of Newhaven’s http://www.newhavendisplay.com/nhd57640480wfctxl-p-2465.html

The resulting output will depend on the previous state of the output data register. - For the LOW data pins, the corresponding GPIO port bits in BSRR[31:16] need to be set to 1 in order to update all the 8-bit data bus lines at once.

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The STM32 LTDC has a peripheral called LTDC LCD TFT Display Controllerwhichprovides a digital parallel interface(DPI) for a variety of LCD and TFT panels. It sends RGB data in parallel to the display and generates signals for horizontal and vertical synchronization (HSYNC, VSYNC), as well as pixel clock (PCLK) and not data enable (DE) signals:

Horizontal timing signal widths are in units of pixel clocks, while vertical timing signal widths are in units of horizontal scan lines. The HSYNC, VSYNC, pixel clock and not data enable signal polarities can be configured to active high or active low in the LTDC_GCR Global Control Register(not data enable signal must be configured invertedwith respect to the data enable signal in the display datasheet). The datasheet of the panel generally provides the timing parameters for the display:

The LTDC has two layers which can be configured, enabled and disabled independently, each with its own FIFO buffer. Layer order is fixed and layer2 is alway on top of layer1. Layer can be enabled writing the LEN Layer Enable bit in the LTDC_LxCR Layer x Control Register. Each layer gets its data from a framebuffer in memory and the start address is written in LTDC_LxCFBAR Layer x Color Frame Buffer Address Register. The frame buffer contains the display frame data in one of eight configurable pixel format: LTDC_LxPFCR Layer x Pixel Format Configuration Registeris configured to choose the pixel format used to store data into the frame buffer. The available pixel formats are:

Each layer can be positioned and resized inside the active area indicating the start and stop position of the visible window in the LTDC_LxWHPCR Layer x Window Horizontal Position Configuration Register and LTDC_LxWVPCR Layer x Window Vertical Position Configuration Register. These parameters select the first and last visible pixels of a line and the first and last visible lines in the window. The values must includes the timing signals (HSYNC and VSYNC) width and the back porch width programmed into LTDC_BPCRregister. In this case the accumulated horizontal back porch is 30 – 1, so the active area starts at 30 and the image is 240 pixel wide so horizontal window stop position is 30 + 240 – 1 = 269 (same for the vertical start and stop positions):

Line length parameter is the number of bytes in a line plus three (so the total line length is number of pixels * bits per pixel + 3). These parameters, together with the layer windowing settings, are useful if we want to display part of an image contained in the frame buffer, as I’ll show later.

Each layer can also have a default color, configured into the LTDC_LxDCCR Layer x Default Color Configuration Register, in ARGB8888 format, that is used outside the layer window or when a layer is disabled:

Some configuration registers are shadowed, meaning their programmed values are stored into shadow registers (not accessible to the programmer) and reloaded into the actual configuration registers based on the configuration of the LTDC_SRCR Shadow Reload Configuration Register: if this register is written with the IMR Immediate Reload bit the registers are reloaded immediately (as soon as the IMR bit is set the registers are reloaded), if the Vertical Blanking Reload bit is written the registers are reloaded with the new values during the vertical blanking period (at the beginning of the first line after the active display area). These bits are set in software and cleared by hardware when shadow registers are reloaded:

The registers read the old values until they’re reloaded and if a new value is written before they’re reloaded the previous value is overwritten. Most of the layers’ configuration registers are shadowed so they must be reloaded after being configured and before anabling the LTDC. The complete LTDC_init() function looks like this:

In this example I use the display on the STM32F429-Discovery board, which is driven by the ILI9341 display controller. The ILI9341 can drive a QVGA (Quarter VGA) 240×320 262,144 colors LCD display. The controller can be configured via SPI (or parallel interface, depending on the panel settings) to use a digital parallel 18 bit RGB interface (since only 6 lines per color channel are wired on the board to the LTDC). Since the display pixel format is less than 8 bit per channel (RGB666 in this case), the RGB display data lines are connected to the most significant bits of the LTDC controller RGB data lines:

Before enabling the LTDC we must configure the clock system. The LTDC uses a specific clock LCD_CLOCK to generate the pixel clock signal and it must be configured and enabled during the system initialization phase:

To display an image we must convert an image file to an array (possibly a const one, so it can be stored in flash memory) of bytes. To do this I used LCD image converter, a simple but powerful application that can convert a file to a variety of different pixel formats:

Once the image is converted to a byte array the generated header file is included and the array address can be used as the frame buffer starting address in the LTDC_LxCFBAR register. Layer window parameters are configured according to the image size (240 x 320, I rotated the image to fit the display in portrait mode).

The second layer can be enabled as well and its contents drawn on top of layer 1. LTDC can manage transparency using the values in the LTDC_LxCACR Layer x Constant Alpha Configuration Register and LTDC_LxBFCR Layer x Blending Factor Configuration Register: here I used a constant alpha of 255 to obtain a 100% opacity (the value in the constant alpha register is divided by 255 by hardware so for example a value of 128 represents an alpha value of 0.5). Since the layer window is smaller than the display area the default layer background color is set to a transparent black (otherwise the default layer background color is used if the layer window is smaller than the display). The image is 110 x 110 pixels and the pixel format is ARGB8888 (the alpha channel is used to draw transparent pixels). Note that the LTDC_LxCBLR and LTDC_LxCBLNR registers are configured according to the image size: the LTDC always starts fetching data from the address defined in the LTDC_LxCFBAR register. I added the following lines of code to the LTDC_init() function to configure and enable layer 2:

Shadow configuration registers are reloaded each vertical blanking period (after the last line has been drawn) and the code waits for the next frame by polling the VSYNCS flag of the LTDC_CDSR Current Display Status Register, whose bits contain the state of the synchronization signals (high if they’re asserted, no matter the polarity configured). Running the code we get a nice smooth animation:

Double buffer is used when we want the code to write on a frame buffer while another buffer is being read by the LTDC. This avoids corrupting the data being displayed on the screen. The buffers are switched during the vertical blanking period using polling or interrupts.

In this example the framebuffers have a RGB888 color depth and for a 240×320 display that makes 225 KiB of memory for each buffer (3 bytes per pixel x 240 x 320 pixels) so they must be stored in external SRAM (the STM32F429I-DISCOVERY has a 64Mbit external SRAM so we’re good). The FMC Flexible Memory Controller has to be initialized and the address of the two frame buffers has to be configured. Drawing on the framebuffer is a matter of writing the right bytes in order to change the color. Once all pixels are drawn (bytes are written) the buffers are switched and the code can draw the next frame:

Now as soon as a frame is done with, calling LTDC_switch_framebuffer() waits for the vertical synchronization period and swaps the buffers. If the code is faster than the display refresh rate (70Hz in our case) it waits for the LTDC to complete drawing the frame.

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Reading the documentation of theese boards and their MCU, I saw that the LQFP144 package of the STM32F4 of theese Nucleos should support the rgb666 interface (not the rgb888), and that"s ok for me, but I found in the datasheets that the LCD_R0 and LCD_R1 pin are not present in the MCU (and Nucleo) pinout.. So, how can I connect the LDC_[R5 to R0] pins of my LCD?

I think a lot of people don"t know how to use it properly, and they are paying too much for displays with a driver chip and even reinforcing the use of modular Nextion-type displays.

From what I understand from this AN, care must be taken to choose the correct clock to match the display clock, and it must also be necessary to use an external RAM memory as a buffer for the display frame.

Therefore, it may be more advantageous to use a driver chip, to avoid a lot of setup with external memory. Since it"s not just a software issue, but also the hardware doesn"t have all the support to perform the direct operation with the TFT display (it doesn"t accept STN either).

so im trying to make a frequency counter with a nucleoSTM32F429zi and i have a few issuse firstly im using a PWM output through a low pass filter to make a sine wave. that works fine however at the end of the project i have to desplay the frequance on an LCD this is where my problems i have an LCD connected properly. but when the PWM is active there is no output to either putty or the LCD i am also unable to send anymore than a single character at a time and i need a string to show the frequancy. please advise me on what is wrong

1. I have found most examples are broken when used in later/modern versions of compilers for one reason or another (stm32 code pre 8 works but after 9 you will have cube lib issues ) and keil is just to variable between mcu"s and longer learning curve for some like me.

4. if you want to us STM then i suggest vscode platformio , it supports cubemx, arduino, cmsis and more, the reason i use it often is i can import sample code from many source libs type (cubemx,cmsis) into a fresh project easily and also use library"s easily (theres some trick to that but i can explain and demonstrate )

6. when starting out with stm32 it is worth having both platformio and stmcube mx /stm cube programmer installed, the reason is you can use the GUI of stm32 cubemx to configure your MCU/CPU and export that project, then with a few simple changes to a platformio.ini file you can have a instant populated project with peripherals configured , the cubemx IDE also has PDF"s and pinouts to the chips so i will often use it just for that and do the code in platformio , i use it because its got plugins that allow me to follow the code easier to the HAL_LL or hall low level and then i can create a bare metal version from there.

Now onto help to configure the FSMC, as mentioned you need GPIO, clocks, FSMC itself ,dma and irq"s with the latter two not fully required for initial function (and give no benefit in the start)

now you will note we have the above #define for the DATA portion of the LCD/FSMC , now just because we define it there does not mean we have configured the hardware fully,

_rs = PD12; // FSMC_A17 //Use PD11 for FSMC_A16 , rs is also known as REGISTER_SELECT and switches between command mode/data mode , when low mode is command mode

as to what MODER, OSPEEDR etc mean you can find that in the 407_vet manual available via cubemx or stm32 web site , but the short of them are they are the registers for each port (GPIOD,GPIOE etc) and the binary bits configure their operation. a example is

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