terasic multi touch lcd module factory

The Terasic Multi-touch LCD Module (MTL) is an all-purpose capacitive touch-screen for FPGA applications and provides multi-touch gesture and single-touch support. An IDE cable with an IDE to GPIO adapter (ITG) is used to interface with various Terasic FPGA development boards through a 2x20 GPIO interface on the MTL.

The kit provides everything you need to develop multimedia applications using a digital multi-touch panel and includes complete reference designs and source code for implementing a photo viewer demonstration and a color painter.

The Video and Embedded Evaluation Kit - Multi-touch, Second Edition, on Cyclone V SoC Development Board (VEEK-MT2-C5SoC) is a comprehensive embedded design environment with everything developers need to create processing-based systems. VEEK-MT2-C5SoC delivers an integrated platform that includes hardware, design tools, intellectual property (IP) and reference designs to develop embedded solutions for a wide range of applications. The fully integrated kit allows developers to rapidly customize their processor and IP to best suit their specific application. The VEEK-MT2-C5SoC features the Intel Cyclone V SoC development board with Intel Cyclone V SX SoC FPGA and a capacitive 7" TFT LCD with 800x480 resolution which supports 5-point touch and multi-touch gestures. An 8-megapixel digital image sensor with autofocus, ambient light sensor, Gyroscope, Magnetometer, and 3-axis accelerometer makes up the rich feature-set. The all-in-one embedded solution offered on the VEEK-MT2-C5SoC, in combination with the LCD touch panel and digital image module, provides embedded developers the ideal platform for multimedia applications with unparallel processing performance. Developers can benefit from the use of this FPGA-based embedded processing system utilizing mitigating design risk and obsolescence, design reuse, reducing bill of material (BOM) costs by integrating powerful graphics engines within the FPGA, and by lower costs.

The Terasic DE5-Net Stratix V GX FPGA Development Kit provides the ideal hardware solution for designs that demand high capacity and bandwidth memory interfacing, ultra-low latency communication, and power efficiency. With a full-height, 3/4-length form-factor package, the DE5-Net is designed for the most demanding high-end applications, empowered with the top-of-the-line Altera Stratix V GX, delivering the best system-level integration and flexibility in the industry.

The Stratix® V GX FPGA features integrated transceivers that transfer at a maximum of 12.5 Gbps, allowing the DE5-Net to be fully compliant with version 3.0 of the PCI Express standard, as well as allowing an ultra low-latency, straight connections to four external 10G SFP+ modules.

DE3 boards include the DE3-340 (338K logic elements) and the DE3-260 (254.4K logic elements) that are optimized with extra on-chip multipliers needed for DSP research and development. All of the DE3s can be stacked and all share the same set of function from the Terasic"s daughter cards connected to them.

The Cyclone EP4CE115 device equipped on the DE2-115 features 114,480 logic elements (LEs), the largest offered in the Cyclone IV E series, up to 3.9-Mbits of RAM, and 266 multipliers.

The TR4 is supported by multiple reference designs and six High-Speed Mezzanine Card (HSMC) connectors that allow scaling and customization with mezzanine daughter cards. For large-scale ASIC prototype development, multiple TR4s can be stacked together to create an easily-customizable multi-FPGA system.

The MAX 10 NEEK from Terasic is a full featured embedded evaluation kit based upon the MAX10 family of Altera FPGAs. The MAX 10 NEEK delivers an integrated platform that includes hardware, design tools, intellectual property and reference designs for developing a wide range of audio, video and many other exciting applications.

The fully integrated kit allows developers to rapidly customize their processor and IP to suit their specific needs, rather than constraining their software around the fixed feature set of the processor. The MAX 10 NEEK combines a 5-point LCD touch panel and digital image module that provides developers an ideal platform for multimedia applications, making the best use of the parallel nature of FPGAs.

The Terasic Multi-Touch LCD Module Second Edition (MTL2) is an all-purpose capacitive touch-screen for your FPGA applications. It provides 5-point Multi-Touch support and a 7" color display LCD with 800x480 resolution. An IDE cable with an IDE-to-GPIO adapter (ITG) is provided in the kit to interface MTL2 with various Terasic FPGA development boards through a 2x20 GPIO interface.

The AD/DA Data Conversion Card was created to provide a set of Analog to Digital and Digital to Analog interfaces including an Audio CODEC interface. The High Speed Mezzanine Card (HSMC) can be used to develop DSP applications with Altera Development boards and Terasic Development boards (e.g.DE3) that feature the HSMC connector.