imx6 lcd panel supplier

The PPC-1030W from Embux is an efficient and compact fanless panel PC that offers a fully featured, self-contained ARM hardware solution at the touch of your fingertips.

The PPC-1030W puts the Cortex-A9 architecture to work by taking full advantage of the NXP i.MX6 DualLite processor. This panel PC offers a robust range of applications with improved power management and graphics capabilities over previous ARM generations. Utilizing 2GB of onboard DDR3 memory while consuming only 7.5 watts, the PPC-1030W is a scalable solution designed for power efficiency and versatility for all your IoT, automation, and in-vehicle application needs.

The PPC-1030W offers excellent connectivity, including 2 USB 2.0 ports, an HDMI port, one LAN port, and 2 COM to accommodate almost any application. The 1280 x 800 color LCD touchscreen takes advantage of an IP65 compliant front panel to protect the projected capacitive touchscreen from ingress. Fanless, silent, and panel or VESA mount ready for embedded applications, the PPC-1030W offers power efficiency and performance optimization without limiting its versatility.

This Embux PPC-1030W has been engineered for the needs of today"s industrial panel PC users and comes pre-installed with 4GB eMMC NAND and Android Lollipop 5.0.2. Accepting a wide power input of 10.8~26.4 volts make this a practical and versatile option for a range of industrial automation needs. Boasting an operating temperature range of 0 to 50 degrees makes this panel PC ideal for users searching for a versatile ARM solution in even challenging environmental conditions.

Hi, i have a custom board with imx6dl processor, running yocto linux. LCD panel connected to parallel LCD interface and working fine in U-boot. But when kernel starts, display is disabled, LCD_PWR_EN pin remains low. But i can see pulses on data and clock lines with oscilloscope. There is boot log:

Kernel command line: console=/dev/fb0,115200 video=mxcfb0:dev=lcd,CLAA-WVGA,if=RGB24,bpp=16,int_clk video=mxcfb1:off ldb=sin0 root=/dev/mmcblk2p2 rootwait rw

why lcdif_pwr_on is disabling? how can i configure kernel (device tree or something else) to use lcd panel on parallel interface as primary display? Thank you.

The kit features two 1Gbps copper Ethernet ports. While the first ethernet port is implemented fully onboard CL-SOM-iMX6 module, the second port is implemented onboard SB-FX6 using the PCI-Express port available with CL-SOM-iMX6. Both ports are exposed through the P9 Dual RJ45 connector.

The secondary Ethernet port (also referred to as SB Ethernet, SB ETH or 2nd Ethrnet) is available through the right side of the dual RJ45 connector P9 (also called P9B). The P31 jumper setting determines whether the CL-SOM-iMX6 PCI-Express interface is utilized for the secondary ethernet port (Ethernet is available through P9B) or for the P40 mini-PCIe socket (Ethernet is not available through P9B) onboard SB-FX6.

The HDMI display interface is accessible through the HDMI connector J5. Default configuration of Debian Linux for CL-SOM-iMX6 uses HDMI as primary video output.

The DVI interface utilizes the Parallel Display Interface available with CL-SOM-iMX6. Simultaneous operation of TD035STEE1, the DVI interface and the HannStar HSD050IDW1/Startek KD050C-1A LCD panels is not supported since they use the same CL-SOM-iMX6 parallel display interface

Evaluation kit supports the HannStar HSD050IDW1 / Startek KD050C-1A LCD panels (one is included with the evaluation kit) through the P50 dedicated FPC connector.

HannStar HSD050IDW1/Startek KD050C-1A LCD panels utilize the Parallel Display Interface available with CL-SOM-iMX6. Simultaneous operation of TD035STEE1, the DVI interface and the HannStar HSD050IDW1/Startek KD050C-1A LCD panels is not supported since they use the same CL-SOM-iMX6 parallel display interface

The CL-SOM-iMX6 resistive touch panel interface is accessible through the P58 and P59 headers. Any 4-wire resistive touch panel can be tested with the system by connecting to P58 and P59 through use of jumper-wires.

By default, some of the CL-SOM-iMX6 parallel camera interface signals are not available with this evaluation kit, please refer to CL-SOM-iMX6 reference manual for details

Some of the SDIO signals are not available with CL-SOM-iMX6 evaluation kit (stock configuration of CL-SOM-iMX6 board). Please refer to CL-SOM-iMX6 hardware reference manual for signal availability details

The interface exposed through P32A connector (left side of P32) utilizes the CL-SOM-iMX6 UART2 interface. Either half or full duplex operation is supported through P32A. P32A operation mode, duplex and other settings are set by software.

CL-SOM-iMX6 SPI2 interface utilized for communicating and LCD panel with this evaluation kit. One can test SPI2 functionality using wire-up from connector P16 or P50 if LCD is not required.

The SPI5 interface signals are not available with this evaluation kit by default. Please refer to CL-SOM-iMX6 reference guide for details on signal availability

Any multifunctional signal available through the CL-SOM-iMX6 carrier board interface can be configured by SW to function as a GPIO. It is recommended to use the multifunctional pins accessible through the SB-FX6 headers above (P56, P26, P21 and P18) to evaluate GPIO functionality.

The evaluation kit RTC (implemented onboard CL-SOM-iMX6) is powered by a coin cell battery. RTC power can be disconnected by removing the coin cell battery from BH1 battery holder.

E2 - CL-SOM-iMX6 onboard EEPROM and bootloader storage write-protection. Populate to enable the EEPROM write protection and allow bootloader storage write-protection.

To begin with, the U-Boot versions we’re shipping don’t yet support displays. Fabio Estevan published some patches that allow Sabre Lite to support the Freescale panel and we have some patches gathering dust that support the RGB display and our 1024×600 panel, but we haven’t yet released this into our shipments.

This clause specifies the output interface used for the display. Options are lcd for the parallel RGB interface, ldb for the LVDS interface and hdmi for the HDMI transmitter.

This clause can either define a named panel such as LDB-XGA or CLAA-WVGA or a resolution in VESA Coordinated Video Timings format. Named panels are defined in a board-specific file.

This clause defines the output format at the transmitter. Options include RGB666 for 18-bit panels and RGB24 for 24-bit displays. Note that this does not define the in memory bit depth of the frame buffer. That’s done with the bpp= kernel command-line parameter.

Support for the 1024×600 LVDS panel was added after the Android image was built. Please note the notes in the comment section for a description of how to add support for this panel.

Established in 1998, Winstar Display Co., Ltd. is a reliable LCD Display Module Manufacturer and LCD Panel Supplier. Winstar has development of high-quality display module products. We operate worldwide, configure, service products, and also provide logistics support to deliver products and services competitively. We provide LCM Modules including monochrome TN/STN/FSTN LCM, COG LCD, TFT LCM / TFT panels, FSC-LCD, graphic LCM, character LCD displays, OLED display modules (PMOLED), custom LCD displays, OLED and LCD panel.

This application note describes the i.MX6 CPU graphical system and the steps to define a new custom TFT (Thin Film Transistor) display panel in Digi Embedded Yocto and discusses the most standard panels available. Some panels may need special consideration.

An LCD panel is a matrix of pixels that are divided into rows and columns. These pixels are individually painted according to different signals and timing parameters, and you can control each pixel"s color individually. The panel is continuously refreshed, typically at around 60 Hz, from the contents of the frame buffer memory. Each memory location on the frame buffer corresponds to a pixel on the LCD panel.

A 1024 x 600 resolution display requires 614400 memory locations, with each location having a number of possible colors. The number of bits needed to describe the available colors is called bits per pixel (bpp). For example, 16 bpp can describe 65536 colors and 24 bits can describe 16777216 colors (known as true color). A panel with 614400 24-bit locations requires a 1800 KB frame buffer.

Every manufacturer provides display timings in a slightly different way and some provide more detail than others. Most LCD panels work with a range of timing parameters.

LCD displays must be created as nodes in the device tree with a display-timings subnode. Display timings binding documentation at Documentation/devicetree/bindings/video/display-timing.txt explains the required timing properties to describe an LCD.lcdname {

hfront-porch is the horizontal front porch, the number of clock pulses (pixels) between the last valid pixel data in the line and the next HSYNC pulse. According to the LCD data format, this value is zero.

vfront-porch is the vertical front porch, the number of lines (HSYNC pulses) between the last valid line of the frame and the next VSYNC pulse. According to the LCD data format, this value is zero.

NoteThe recommended timings from the LCD datasheet often do not work perfectly, as each platform introduces noise and delays that affect the display"s signals and timings.

This color chart displays a white one-pixel frame at the edges of the LCD (which allows you to verify correct position and width/height), and gradients of red, green, blue, and white (which allow you to verify correct color depth and format).

Default resolution with these overlays: 800x480ModuleBoardAccessoryKernelOverlaysApalis iMX6Evaluation, Ixora V1.0toradex_5.4-2.3.x-imxapalis-imx6_lcd-lt161010_overlay.dtbo apalis-imx6_atmel-mxt_overlay.dtbo

Colibri iMX6Evaluation, Aster V1.0, Iris V1.1, Viola (Plus) V1.1/1.2toradex_5.4-2.3.x-imxcolibri-imx6_lcd-lt161010_overlay.dtbo colibri-imx6_atmel-mxt-adapter_overlay.dtbo

Colibri iMX6Evaluation, Aster V1.0, Iris V1.1, Viola (Plus) V1.1/1.2toradex_5.4.ycolibri-imx6_parallel-rgb_overlay.dtbo colibri-imx6_atmel-mxt-adapter_overlay.dtbo display-lt161010_overlay.dtbo

Colibri iMX6Aster V1.1, Iris V2.0toradex_5.4.ycolibri-imx6_parallel-rgb_overlay.dtbo colibri-imx6_atmel-mxt-connector_overlay.dtbo display-lt161010_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluation, Aster V1.0, Iris V1.1, Viola (Plus) V1.1/1.2toradex_5.4-2.3.x-imxcolibri-imx6ull_lcd-lt161010_overlay.dtbo colibri-imx6ull_atmel-mxt-adapter_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Aster V1.1, Iris V2.0toradex_5.4-2.3.x-imxcolibri-imx6ull_lcd-lt161010_overlay.dtbo colibri-imx6ull_atmel-mxt-connector_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluationtoradex_5.4.ycolibri-imx6ull_parallel-rgb_overlay.dtbo display-lt161010_overlay.dtbo colibri-imx6ull_atmel-mxt-adapter_overlay.dtbo

Colibri iMX7 Dual 1GB (eMMC)Evaluation, Aster V1.0, Iris V1.1, Viola (Plus) V1.1/1.2toradex_5.4-2.3.x-imxcolibri-imx7_lcd-lt161010_overlay.dtbo colibri-imx7_atmel-mxt-adapter_overlay.dtbo

Colibri iMX7 Dual 1GB (eMMC)Aster V1.1, Iris V2.0toradex_5.4-2.3.x-imxcolibri-imx7_lcd-lt161010_overlay.dtbo colibri-imx7_atmel-mxt-connector_overlay.dtbo

Default resolution with these overlays: 1280x800ModuleBoardAccessoryKernelOverlaysApalis iMX6Evaluation, Ixora V1.0toradex_5.4-2.3.x-imxapalis-imx6_lvds-lt170410_overlay.dtbo apalis-imx6_atmel-mxt_overlay.dtbo

Colibri iMX6Iris v2.0toradex_5.4.ycolibri-imx6_parallel-rgb-lvds_overlay.dtbo colibri-imx6_atmel-mxt-connector_overlay.dtbo display-dpi-lt170410_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Iris v2.0toradex_5.4.ycolibri-imx6ull_parallel-rgb-lvds_overlay.dtbo display-dpi-lt170410_overlay.dtbo colibri-imx6ull_atmel-mxt-connector_overlay.dtbo

Default resolution with these overlays: 800x480ModuleBoardAccessoryKernelOverlaysApalis iMX6Evaluation, Ixoratoradex_5.4-2.3.x-imxapalis-imx6_lcd-lt161010_overlay.dtbo apalis-imx6_stmpe-ts_overlay.dtbo

Colibri iMX6Evaluation, Aster, Iris, Violatoradex_5.4.ycolibri-imx6_parallel-rgb_overlay.dtbo colibri-imx6_stmpe-ts_overlay.dtbo display-lt161010_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluation, Aster, Iris, Violatoradex_5.4-2.3.x-imxcolibri-imx6ull_lcd-lt161010_overlay.dtbo colibri-imx6ull_ad7879_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluationtoradex_5.4.ycolibri-imx6ull_parallel-rgb_overlay.dtbo display-lt161010_overlay.dtbo colibri-imx6ull_ad7879_overlay.dtbo

Colibri iMX7 Dual 1GB (eMMC)Evaluation, Aster, Iris, Violatoradex_5.4-2.3.x-imxcolibri-imx7_lcd-lt161010_overlay.dtbo colibri-imx7_ad7879_overlay.dtbo

If the set module+board is not on this list, it doesn"t support an HDMI interface.ModuleBoardAccessoryKernelOverlaysApalis iMX6Evaluation, Ixoratoradex_5.4-2.3.x-imxapalis-imx6_hdmi_overlay.dtbo

If the board is not on this list, it doesn"t have a VGA interface.ModuleBoardKernelOverlaysApalis iMX6Evaluationtoradex_5.4-2.3.x-imxapalis-imx6_vga_overlay.dtbo

Default resolution with these overlays: 800x480ModuleBoardAccessoryKernelOverlaysApalis iMX6Evaluation, Ixoratoradex_5.4-2.3.x-imxapalis-imx6_lcd-lt161010_overlay.dtbo apalis-imx6_stmpe-ts_overlay.dtbo

Colibri iMX6Evaluation, Aster, Iris, Violatoradex_5.4.ycolibri-imx6_parallel-rgb_overlay.dtbo colibri-imx6_stmpe-ts_overlay.dtbo display-edt7_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluation, Aster, Iris, Violatoradex_5.4-2.3.x-imxcolibri-imx6ull_lcd-lt161010_overlay.dtbo colibri-imx6ull_ad7879_overlay.dtbo

Colibri iMX6ULL 1GB (eMMC)Evaluationtoradex_5.4.ycolibri-imx6ull_parallel-rgb_overlay.dtbo colibri-imx6ull_ad7879_overlay.dtbo display-edt7_overlay.dtbo

Apalis iMX6toradex_5.4.yapalis-imx6_parallel-rgb_overlay.dtbo display-edt7_overlay.dtbo apalis-imx6_stmpe-ts_overlay.dtbo apalis-imx6_hdmi_overlay.dtbo

Colibri iMX6ULL 256/512MBBy default the capacitive touch adapter, resistive touch and VESA VGA display timings are configured via regular device tree(s) as overlays are not supported on raw NAND based modules